FSA1256AL8X_NL Fairchild Semiconductor, FSA1256AL8X_NL Datasheet
FSA1256AL8X_NL
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FSA1256AL8X_NL Summary of contents
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... FP FSA1258L8X ED FSA1258AL8X FS All packages are lead free per JEDEC: J-STD-020B standard. MicroPak™ trademark of Fairchild Semiconductor Corporation. © 2004 Fairchild Semiconductor Corporation FSA1256(A) / FSA1257(A) / FSA1258(A) Rev. 1.0.5 Description The FSA1256, FSA1256A, FSA1257, FSA1257A, CCT FSA1258, and FSA1258A are high performance dual CC Single Pole/Single Throw (SPST) analog switches ...
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... Truth Table Control Input, 1S LOW Logic Level HIGH Logic Level Pin Descriptions Name © 2004 Fairchild Semiconductor Corporation FSA1256(A) / FSA1257(A) / FSA1258(A) Rev. 1.0.5 Function Figure 3. FSA1258, FSA1258A Function Control Input 2S 1A Connected LOW Logic Level Disconnect HIGH Logic Level ...
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... Thermal Resistance in Still Air, MicroPak 8L Package (modeled Operating Temperature A Note: 2. Unused inputs must be held HIGH or LOW. They must not float. © 2004 Fairchild Semiconductor Corporation FSA1256(A) / FSA1257(A) / FSA1258(A) Rev. 1.0.5 Parameter FSA1256, FSA1257, FSA1258 FSA1256A, FSA1257A, FSA1258A Parameter FSA1256, FSA1257, FSA1258 FSA1256A, FSA1257A, FSA1258A ...
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... R =R – R measured at identical Vcc, temperature, and voltage max ON min 6. Flatness is defined as the difference between the maximum and minimum value of on resistance (R specified range of conditions. © 2004 Fairchild Semiconductor Corporation FSA1256(A) / FSA1257(A) / FSA1258(A) Rev. 1.0.5 Conditions V (V) CC 4.5 to 5.5 2.7 to 3.6 1.65 to 1.95 4.5 to 5.5 FSA1256A, FSA1257A, 2 ...
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... IN Note: 7. Guaranteed, but not tested for V Capacitance Symbol Parameter C Control Pin Input Capacitance Port Off Capacitance OFF C A Port On Capacitance ON © 2004 Fairchild Semiconductor Corporation FSA1256(A) / FSA1257(A) / FSA1258(A) Rev. 1.0.5 Conditions V (V) CC Min. 4.5 to 5.5 =50Ω, C =35pF L 2.7 to 3.6 =50Ω, C =35pF L 1.65 to =50Ω, C =35pF 1 ...
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... ON B0, GND = Figure 4. On Resistance I A(ON) NC Select V S Figure 6. On Leakage GND © 2004 Fairchild Semiconductor Corporation FSA1256(A) / FSA1257(A) / FSA1258(A) Rev. 1.0 Select GND Figure 5. A GND GND = GND = 2 ...
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... GND R and R S environment (50, 75, or 100 ). V Sel GND R and R S environment (50, 75, or 100 ). © 2004 Fairchild Semiconductor Corporation FSA1256(A) / FSA1257(A) / FSA1258(A) Rev. 1.0 OUT GND R S Sel are functions of the application L Figure 9. ...
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... SEL GND B0,B1 Capacitance Meter f=1MHz Figure 14. Channel Off Capacitance V CNTRL GND R and R S application environment. © 2004 Fairchild Semiconductor Corporation FSA1256(A) / FSA1257(A) / FSA1258(A) Rev. 1.0.5 GND GND R T GND are functions of the application Crosstalk = 20 Log (V Figure 12. Adjacent Channel Crosstalk Input – ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’ ...
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... Fairchild Semiconductor Corporation FSA1256(A) / FSA1257(A) / FSA1258(A) Rev. 1.0.5 10 www.fairchildsemi.com ...