74AVC16244DGG,512 NXP Semiconductors, 74AVC16244DGG,512 Datasheet - Page 9

CI BUFF DVR TRI-ST 16BIT 48TSSOP

74AVC16244DGG,512

Manufacturer Part Number
74AVC16244DGG,512
Description
CI BUFF DVR TRI-ST 16BIT 48TSSOP
Manufacturer
NXP Semiconductors
Series
74AVCr
Datasheet

Specifications of 74AVC16244DGG,512

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
4
Number Of Bits Per Element
4
Current - Output High, Low
12mA, 12mA
Voltage - Supply
1.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Logic Family
AVC
Number Of Channels Per Chip
16
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
High Level Output Current
- 12 mA
Low Level Output Current
12 mA
Minimum Operating Temperature
- 40 C
Output Type
3-State
Propagation Delay Time
2.6 ns (Typ) at 1.2 V, 1.8 ns (Typ) at 1.5 V, 1.7 ns (Typ) at 1.8 V, 1.3 ns (Typ) at 2.5 V, 1.1 ns (Typ) at 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74AVC16244DG
74AVC16244DG
935264443512
Philips Semiconductors
1999 Nov 15
handbook, full pagewidth
handbook, full pagewidth
16-bit buffer/line driver; 3-state
(3.6 V tolerant)
V
3.0 to 3.6 V
t
t
t
OL
PLH
PLZ
PHZ
2.3 to 2.7 V
TEST
and V
/t
/t
/t
PZL
PHL
PZH
V
OH
CC
are typical output voltage drop that occur with the output load.
open
2 x V
GND
S1
CC
0.5V
0.5V
V
HIGH-to-OFF
OFF-to-HIGH
M
LOW-to-OFF
OFF-to-LOW
CC
CC
nOE input
GENERATOR
output
output
PULSE
<2.3 V
2.3 to 2.7 V V
3.0 to 3.6 V V
V
V
Fig.7 The 3-state output enable and disable times.
OL
OL
V
GND
GND
CC
V OH
V CC
+ 0.15 V
+ 0.3 V
V OL
V
V I
Fig.8 Test circuitry for switching times.
X
V I
V
CC
CC
CC
V
V M
V
V
I
enabled
R T
outputs
OH
OH
t PLZ
t PHZ
D.U.T.
1000
500
500
V CC
V
0.15 V V
0.3 V
Y
R
load
V X
9
V Y
V O
V
CC
CC
V
disabled
outputs
Definitions for test circuit:
C
(See Chapter “AC characteristics”);
R
impedance Z
C L
I
L
T
= load capacitance including jig and probe capacitance
= termination resistance should be equal to the output
t PZL
t PZH
R load
R load
o
of the pulse generator.
S1
V M
V M
MNA505
outputs
enabled
MNA478
2
open
GND
V CC
74AVC16244
Product specification

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