74LVT652D,112 NXP Semiconductors, 74LVT652D,112 Datasheet - Page 2

IC TRANSCEIVER 8BIT N-INV 24SOIC

74LVT652D,112

Manufacturer Part Number
74LVT652D,112
Description
IC TRANSCEIVER 8BIT N-INV 24SOIC
Manufacturer
NXP Semiconductors
Series
74LVTr
Datasheet

Specifications of 74LVT652D,112

Logic Type
Transceiver, Non-Inverting
Number Of Elements
1
Number Of Bits Per Element
8
Current - Output High, Low
32mA, 64mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LVT652D
74LVT652D
935167230112
Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
ORDERING INFORMATION
PIN CONFIGURATION
24-Pin Plastic SOL
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
1998 Feb 19
Independent registers for A and B buses
Multiplexed real-time and stored data
3-State outputs
Output capability: +64mA/–32mA
TTL input and output switching levels
Input and output interface capability to systems at 5V supply
Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
Live insertion/extraction permitted
No bus current loading when output is tied to 5V bus
Power-up 3-State
Power-up reset
Latch–up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
3.3V Octal transceiver/register, non-inverting
(3-State)
SYMBOL
t
t
I
C
C
CCZ
PLH
PHL
I/O
IN
PACKAGES
OEAB
CPAB
Propagation delay
An to Bn or Bn to An
Input capacitance
I/O capacitance
Total supply current
GND
SAB
A0
A1
A2
A3
A4
A5
A6
A7
10
12
11
1
2
3
4
5
6
7
8
9
PARAMETER
SV00051
TEMPERATURE RANGE
24
23
22
21
20
19
18
17
16
15
14
13
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
V
CPBA
SBA
OEBA
B0
B1
B2
B3
B4
B5
B6
B7
CC
OUTSIDE NORTH AMERICA
C
V
V
Outputs disabled; V
Outputs disabled; V
L
CC
I
2
= 0V or 3V
= 50pF;
= 3.3V
DESCRIPTION
The LVT652 is a high-performance BiCMOS product designed for
V
This device combines low static and dynamic power dissipation with
high speed and high output drive.
The 74LVT652 transceiver/register consists of bus transceiver
circuits with 3-State outputs, D–type flip-flops, and control circuitry
arranged for multiplexed transmission of data directly from the input
bus or the internal registers. Data on the A or B bus will be clocked
into the registers as the appropriate clock pin goes High. Output
Enable (OEAB, OEBA) and Select (SAB, SBA) pins are provided for
bus management.
PIN DESCRIPTION
74LVT652 PW
74LVT652 DB
74LVT652 D
CC
4, 5, 6, 7, 8, 9,
20, 19, 18, 17,
PIN NUMBER
T
16, 15, 14, 13
amb
operation at 3.3V.
10, 11
1, 23
2, 22
3, 21
CONDITIONS
= 25 C; GND = 0V
12
24
I/O
CC
= 0V or 3V
= 3.6V
SAB / SBA
SYMBOL
A0 – A7
B0 – B7
OEAB /
CPAB /
OEBA
CPBA
GND
V
CC
NORTH AMERICA
74LVT652PW DH
74LVT652 DB
74LVT652 D
A to B clock input / B to A
clock input
A to B select input / B to A
select input
A to B Output Enable input
(active-High) /
B to A Output Enable input
(active-Low)
Data inputs/outputs (A side)
Data inputs/outputs (B side)
Ground (0V)
Positive supply voltage
TYPICAL
0.13
2.8
2.6
10
4
FUNCTION
Product specification
74LVT652
DWG NUMBER
853-1748 18987
SOT137-1
SOT340-1
SOT355-1
UNIT
mA
pF
pF
ns

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