SAK-C167CS-4R40M CA+ Infineon Technologies, SAK-C167CS-4R40M CA+ Datasheet - Page 78

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SAK-C167CS-4R40M CA+

Manufacturer Part Number
SAK-C167CS-4R40M CA+
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of SAK-C167CS-4R40M CA+

Packages
PG-MQFP-144
Max Clock Frequency
40.0 MHz
Sram (incl. Cache)
11.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
24
Program Memory
32.0 KByte
Figure 23
Notes
4)
5)
Data Sheet
This is the last chance for BREQ to trigger the indicated regain-sequence.
Even if BREQ is activated earlier, the regain-sequence is initiated by HOLD going high.
Please note that HOLD may also be deactivated without the C167CS requesting the bus.
The next C167CS driven bus cycle may start here.
CLKOUT
HOLD
HLDA
BREQ
CS
Other
Signals
External Bus Arbitration, (Regaining the Bus)
tc
29
tc
28
tc
74
29
4)
tc
30
tc
tc
5)
29
34
tc
32
C167CS-4R
V2.2, 2001-08
C167CS-L
MCT04422

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