SAF-C161O-LM Infineon Technologies, SAF-C161O-LM Datasheet - Page 13

• Manufacturer Part Number: SAF-C161O-LM
• Manufacturer: Infineon Technologies

Specifications of SAF-C161O-LM

• Packages: PG-MQFP-80
• Max Clock Frequency: 20.0 MHz
• Sram (incl. Cache): 2.0 KByte
• Program Memory: 0.0 KByte

Functional Description
The architecture of the C161K/O combines advantages of both RISC and CISC
processors and of advanced peripheral subsystems in a very well-balanced way. In
addition the on-chip memory blocks allow the design of compact systems with maximum
performance.
The following block diagram gives an overview of the different on-chip components and
of the advanced, high bandwidth internal bus structure of the C161K/O.
Note: All time specifications refer to a CPU clock of 25 MHz
Figure 3
The program memory, the internal RAM (IRAM) and the set of generic peripherals are
connected to the CPU via separate buses. A fourth bus, the XBUS, connects external
resources as well as additional on-chip resources, the X-Peripherals (see
Data Sheet
8
8
(see definition in the AC Characteristics section).
ProgMem
Internal
ROM
Area
XBUS Control
External Bus
Port 0
Block Diagram
Control
16
EBC
Instr. / Data
16
16
Port 1
32
16
External Instr. / Data
(USART)
ASC0
BRGen
Interrupt Controller 16-Level
Port 3
C166-Core
CPU
BRGen
SSC
(SPI)
15
9
PEC
Priority
GPT1
T2
T3
T4
Interrupt Bus
GPT2
Peripheral Data Bus
T5
T6
Data
Data
16
Port 5
16
16
6
1/2 Kbyte
Osc
Internal
IRAM
MCB04323_1ko
RAM
Figure
V2.0, 2001-01
WDT
C161O
C161K
3).
XTAL
8