TLE8110EE Infineon Technologies, TLE8110EE Datasheet
TLE8110EE
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TLE8110EE Summary of contents
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... Smart Multichannel Low Side Switch with Parallel Control and SPI Interface coreFLEX TLE8110EE Rev. 1.3.1, 2011-05- ...
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Table of Content 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Daisy-Chain and 2x8-bit protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... Low-Side Switch in Smart Power Technology [SPT] with Serial Peripheral Interface [SPI] and 10 open drain DMOS output stages. The TLE8110EE is protected by embedded protection functions and designed for automotive and industrial applications. The output stages are controlled via Parallel Input Pins for PWM use or SPI Interface ...
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... Nominal Output current (CH 5-6) Nominal Output current (CH 7-10) Output Current Shut-down Threshold (CH 1-4) min. Output Current Shut-down Threshold (CH 5-6) min. Output Current Shut-down Threshold (CH 7-10) min. V Batt Supply IC Micro Controller SPI_SO SPI _CLK SPI_CS Figure 1 Block Diagram TLE8110EE Data Sheet Symbol DS(CL)typ R ON1-4 R ON5-6 R ...
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... Optionally, the logic part can be supplied with lower voltages to achieve signal compatibility with e.g. 3.3V logic level [CMOS - level]. The TLE8110EE is equipped with 10 parallel input pins that are routed to each output channel. This allows control of the channels for loads driven by Pulse Width Modulation (PWM). The output channels can also be controlled by SPI ...
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Diagnosis The device provides diagnosis of the load, including open load, short to GND as well as short circuit to V detection and over-load / over-temperature indication. The SPI diagnosis flags indicates if latched fault conditions may have occurred. Protection ...
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Pin Configuration 3.1 Pin Assignment Figure 3 Pin Configuration 3.2 Pin Definitions and Functions Pin Symbol Function 1 GND Ground 2 P_IN1 Parallel Input Pin 1. Default assignment to Output Channel 1. 3 P_IN2 Parallel Input Pin 2. Default ...
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Pin Symbol Function 19 GND Ground 20 OUT9 Drain of Power Transistor Channel 9 21 OUT10 Drain of Power Transistor Channel 10 22 N.C. internally not connected, connect to Ground 23 GND Ground 24 OUT6 Drain of Power Transistor Channel ...
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Terms V P _IN1 V P _IN2 _IN3 V P _IN4 _IN5 _CLK V S _CS V ...
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General Product Characteristics 4.1 Absolute Maximum Ratings 1) Absolute Maximum Ratings T = -40°C to +150°C; all voltages with respect to ground, positive current flowing into pin j (unless otherwise specified) Pos. Parameter Supply Voltages 4.1.1 Digital Supply voltage ...
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Absolute Maximum Ratings (cont’ -40°C to +150°C; all voltages with respect to ground, positive current flowing into pin j (unless otherwise specified) Pos. Parameter 4.1.20 Electro Static Discharge Voltage “Charged Device Model - CDM” 4.1.21 Electro Static ...
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Thermal Resistance Pos. Parameter 4.3.1 Junction to Soldering Point 4.3.2 Junction to Ambient 1) Not subject to production test, specified by design. 2) Homogenous power distribution over all channels (All Power stages equally heated), dependent on cooling set-up. Figure ...
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... Power Supply 5.1 Description Power Supply The TLE8110EE is supplied by analogue power supply line V device, such as the gate control of the power stages. The digital power supply line V part and offers the possibility to adapt the logic level of the serial output pins to lower logic levels. ...
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Electrical Characteristics Power Supply Electrical Characteristics: Power Supply V V 3.0V < < 5.5V; 4.5V < < 5.5V flowing into pin (unless otherwise specified) Pos. Parameter Digital Supply and Power-on Reset 5.2.1 Digital Supply Voltage 5.2.2 Digital ...
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Electrical Characteristics: Power Supply V V 3.0V < < 5.5V; 4.5V < < 5.5V flowing into pin (unless otherwise specified) Pos. Parameter Analogue Supply and Power-on Reset 5.2.8 Analogue Supply Voltage 5.2.9 Analogue Supply Current during Reset a) ...
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... Reset and Enable Inputs 6.1 Description Reset and Enable Inputs The TLE8110EE contains one Reset- and one Enable Input Pin as can be seen in Description: Reset Pin [RST] is the main reset and acts as the internal under voltage reset monitoring of the digital supply voltage soon as RST is pulled low, the whole device including the control registers is reset. ...
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V DD Enable not valid ENh T< ENmin ENl OUTx Figure 7 Timing Data Sheet Device OFF Enable of OUTx OFF Output t ENrr 18 TLE 8110 EE Smart Multichannel Switch Reset and Enable Inputs ...
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... Description Power Outputs The TLE8110EE channel low-side powertrain switch. The power stages are built by N-channel power MOSFET transistors. The device is a universal multichannel switch but mostly suited for the use in Engine Management Systems [EMS]. Within an EMS, the best fit of the channels to the typical loads is: • ...
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Description of the Clamping Structure When switching off inductive loads, the potential at pin OUT rises to V intends to continue driving the current. The clamping voltage is necessary to prevent destruction of the device, see Figure 9 for ...
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Increasing Inductance with I (Relays and some Valve types) Ctrl ON OFF · i R-Temp Effect E CL µ-increase E Effect CLm t 0 ...
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Electrical Characteristics: Power Outputs (cont’ 3.0V < < 5.5V; 4.5V < < 5.5V flowing into pin (unless otherwise specified) Pos. Parameter 1)2)3)4) Clamping Energy - Repetitive Channel Group 1-4 7.3.4 Repetitive Clamping Energy Channel 5-6 7.3.5 ...
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Electrical Characteristics: Power Outputs (cont’ 3.0V < < 5.5V; 4.5V < < 5.5V flowing into pin (unless otherwise specified) Pos. Parameter Clamping Voltage 7.3.10 Output Clamping Voltage, Channel Timing 7.3.11 Output Switching Frequency ...
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RDS_ON / Ohm 0,6 0,5 0,4 0,3 0,2 -40 -20 Figure 12 CH 1-4: typical behavior of RDS_ON versus the junction temperature Tj RDS_ON / Ohm 0,5 0,4 0,3 0,2 0,1 -40 -20 Figure 13 CH 5-6: typical behavior of ...
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RDS_ON / Ohm 1.2 1.0 0.8 0.6 0.4 -40 Figure 14 CH7-10: typical behavior of RDS_ON versus the junction temperature Tj VCL / -40 -20 Figure 15 All Channels: typical behavior of the clamping ...
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... Parallel Connection of the Power Stages The TLE8110EE is equipped with a structure which improves the capability of parallel-connected channels. The device can be “informed” via the PMx.PMx - bits (see chapter control of the device) which of the channels are connected in parallel. The input channels can be mapped to the parallel connected output channels in order to apply the PWM signals ...
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Table 2 Performance Pos. Parameter Channel Group 1-4 7.4.1 Maximum overall current before reaching lower limit threshold 7.4.2 Maximum overall Repetitive Clamping Energy Channel Group 5-6 7.4.3 Maximum overall current before reaching lower limit threshold 7.4.4 Maximum overall Repetitive ...
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Table 3 Performance Pos. Parameter Channel Group 1-4 7.4.1 Maximum overall current before reaching lower limit threshold 7.4.2 Maximum overall Repetitive Clamping Energy Channel Group 5-6 7.4.3 Maximum overall current before reaching lower limit threshold 7.4.4 Maximum overall Repetitive ...
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... Diagnosis 8.1 Diagnosis Description The TLE8110EE provides diagnosis information about the device and about the load. Following diagnosis flags have been implemented for each channel: 1) Diagnosis Short to Ground No Fault Open Load Overcurrent / Overtemperature OCT 1) No priority scheme is implemented for the diagnosis detection, any new diagnosis entry will override the previous one ...
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Open Load diagnosis read out of the Diagnosis Register, the following procedure is required in order to confirm the channel status and ensure a safe operation of the device: After reading the OL [01 ] ...
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Figure 17 Diagnosis Confirmation procedure V DD Diagnosis Register Figure 18 Block Diagram of Diagnosis Data Sheet DCC.DRx (read diagnosis) yes no actions yes SCG take SCG action ? no yes t OL wait with d (max) ...
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Electrical Characteristics Diagnosis Electrical Characteristics: Diagnosis V V 3.0V < < 5.5V; 4.5V < < 5.5V flowing into pin (unless otherwise specified) Pos. Parameter Open Load Diagnosis 8.2.1 Open load detection threshold voltage 8.2.2 Output pull-down diagnosis ...
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Diagnosis Blind Time [DBT] activation DBT is triggered by Open Load [OL] or Short-to-Ground [SG] -detection during OFF-condition of CH7-10. DBT is activated by DEVS.DBT1, DEVS.DBT2 (see „Control of the device“). INx Signal ON Output Voltage Diagnosis Blind Time [DBT] ...
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... Parallel Inputs 9.1 Description Parallel Inputs There are 10 input pins available are on TLE8110EE to control the output stages. Each input signal controls the output stages of its assigned channel. For example, IN1 controls OUT1, IN2 controls OUT2, etc. A “Low”-Signal at INx switches the related Output Channel off. The zener diode protects the input circuit against ESD pulses. For details about the Boolean operation, refer to the chapter “ ...
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... Document. Fault conditions are considered “outside” the normal operating range. Protection functions are not designed for continuous repetitive operation. There is an over load and over temperature protection implemented in the TLE8110EE protection function becomes active during the write cycle of Diagnosis Information into the Diagnosis Register, the information is latched and stored into the diagnosis register after the write process ...
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DSD(high) I DSD(low) Filter timer is started at • OFFcl _h • OFFcl _l DSD(low) Figure 22 Overload shutdown thresholds and delay times ...
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Electrical Characteristics Overload Protection Function Electrical Characteristics: Overload Protection Function V V 3.0V < < 5.5V; 4.5V < < 5.5V flowing into pin (unless otherwise specified) Pos. Parameter Over Current Protection 10.1.1 Output Current Shut-down Threshold Low ...
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Electrical Characteristics: Overload Protection Function (cont’ 3.0V < < 5.5V; 4.5V < < 5.5V flowing into pin (unless otherwise specified) Pos. Parameter Reverse Current Protection 10.1.11 Reverse Current Comparator Switch-off Current level ...
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I D Leakage (neighbour channel) RCP not active Reverse Current Comparator Switch-off Current level I RCP_off Maximum Rating I - DSD(low Batt 300mV t RCP_on_delay RCP active: Regulation ...
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I /A RCP_off Figure 24 Reverse Current Protection Comparator (typical behavior vs junction temperature) Data Sheet TLE 8110 EE Smart Multichannel Switch Protection Functions 80 ...
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SPI Interface 11.1 Description 16 bit SPI Interface The diagnosis and control interface is based on a serial peripheral interface (SPI). The SPI is a full duplex synchronous serial slave interface, which uses four lines: S_SO, S_SI, ...
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Electrical Characteristics 16 bit SPI Interface Electrical Characteristics: 16 bit SPI Interface V V 3.0V < < 5.5V; 4.5V < < 5.5V flowing into pin (unless otherwise specified) Pos. Parameter Input Characteristics (CS, SCLK, SI) 11.3.1 L ...
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Electrical Characteristics: 16 bit SPI Interface (cont’ 3.0V < < 5.5V; 4.5V < < 5.5V flowing into pin (unless otherwise specified) Pos. Parameter 11.3.19 Output disable time (rising tri- state) 11.3.20 Output data ...
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... Description 16 bit SPI Interface Signals S_CS - Chip Select: The system micro controller selects the TLE8110EE by means of the S_CS pin. Whenever the pin is in low state, data transfer can take place. When S_CS is in high state, any signals at the S_CLK and S_SI pins are ignored and S_SO is forced into a high impedance state ...
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... S_SO pin following the rising edge of S_CLK. 12.2.2 Daisy Chain The SPI-Interface of TLE8110EE provides daisy chain capability, see configuration several devices are activated by the same S_CS signal. The S_SI line of one device is connected with the S_SO line of another device (see with the output and input of the master device, S_SO and S_SI respectively ...
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S_CS S_SI S_SO * dependent on ADR; In case CMD or DCC is addressed, related content. Figure 28 16-bit protocol S_SI Serial Input W/R ADDR Field Bits W/R 15 ADDR 14:12 DATA/CMD 11:0 S_SO Serial ...
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Note: Reading a register needs two SPI frames. In the first frame the RD command is sent. In the second frame the output at SPI signal SO will contain the requested information. A new command can be executed in the ...
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S_SI Serial Input Upper Byte Field Bits Upper Byte 15:8 Lower Byte 7:0 S_SO Serial Output Upper Byte 1) after reset is send a Short Diagnosis and Device Status CMD_CSDS, ...
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... Few simplified rules must be followed for a safe SPI communication in daisy-chain environment: 1. All TLE8110EE devices have to be routed at the beginning of the chain, other devices than TLE8110EE afterward 2. compactCONTROL commands (2x8-bit protocol) must not be addressed to TLE8110EE 3 ...
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Critical Communication with first 8-bit interpreted as compactCONTROL (2x8-bit protocol ) S_CS first 8-bit that could interfere with compacCONTROL of device 1 S_SI to dev.n S_SO from dev.n lower-byte from dev.n affected by the reaction of dev.1 to compactCONTROL Safe ...
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Critical Communication with dev.n+1 response altered by dev .n response to previous DRA /DRACL SPI daisy-chain word S_CS S_SI x-command to dev.n+1 S_SO from dev.n+1 Safe Communication with NOP command send to dev .n+1 and ignored response SPI daisy-chain word ...
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... SPI protocols is in the correct order. The device has a receiver-side counter, and a defined counter size. The modulo counter specifies the number of subsequent numbers available. In case of TLE8110EE Modulo 8 counter specifies 8 serial numbers. The modulo 8 counter ensures that data is taken only, when a multiple of 8 bit has been transferred ...
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Table 1 Name Type Addr Short Description 1) CMD W 000 Commands 001 Diagnosis Registers and Compact Control DCC B OUTx W/R 010 Output Control Register CHx. B W/R 011 Device Settings DEVS B MSCS W/R 100 ...
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... IS1[1:0]: AND IN/Serial-Mod0 = 11 IN-Mode = 10 Serial-Mode OUT1 Serial-Mode OUT1 IN1 OUT1 IN2 OUT2 IN3 IN4 IN10 OUT 10 Figure 33 Logic Output Control Block Diagram TLE8110EE Data Sheet DC18[0]: Diagn. current off = 0 IS1[1:0] Diagn. Current IS2[1:0] 11 PM12=1 10 PM12=0 0x PM23=1 PM23=0 CH5 PM56=1 ...
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CMD - Commands By using the Address Range CMD[14:12]=’000’ commands can be send to the device. The Feedback of the commands is provided in the next SPI SO Frame.Details about the Feedback on each command is described in the ...
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Field Command Type CMD_NOP 0000 W CMD_RINx 1000 W CMD_RPC 0100 W CMD_RSDS 0010 W CMD_RSD 0001 W 12.3.1.1 CMD_RSD - Command: Return Short Diagnosis The Command CMD_RSD offers the possibility to read out the OR-operated “short”-Diagnosis within one SO ...
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Field Bits Type - - - 12.3.1.2 CMD_RSDS - Command: Return Short Diagnosis and Device Status The Command CMD_RSD offers the possibility to read out the OR-operated “short”-Diagnosis and the device Status - such as Reset-Information and Communication Error - ...
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S_SO SPI_Serial Output PAR Field Bits Type - 7 ...
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Behaviour of SDS 3 and SDS 4 in relation to RST , EN, VDD, VCC and CMD .CSDS SDS3 VCC or... RST SDS3 0 SDS4 EN=1 VCC or... RST SDS4 0 VDD SDS4 0 SDS4 EN=0 VCC or... RST SDS4 ...
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CMD_RPC - Command: Return Pattern Check The Command CMD_RPC offers the possibility to get returned the previous Command to check if the communication works well. The data to be send is latched at the end of the command frame ...
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CMD_RINx S_CS S_SI W S_SO Figure 38 SPI Feedback on CMD_RINx S_SO SPI_Serial Output PAR Field Bits Type - - - Data Sheet xxxx CMD_RINx R/W dept. of INx previous R/W 11 ...
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IN1 IN2 INx Latch CMD_RINx SI SO Figure 39 Read-out of INx Pins 12.3.2 DCC - Diagnosis Registers and compactCONTROL The DCC - Diagnosis and Compact Control Set allows to read out and clear the Diagnosis Registers. ...
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Diagnosis Clear-to-Read idle time ( S_CS S_SI Diagnosis Overcurrent -to-Clear idle time ( S_CS S_SI Figure 40 Diagnosis idle times DCC Diagnosis Registers and Compact Control S_SI SPI_Serial Input DCC 11 10 DRA 0 1 DRB 0 1 DRACL 0 ...
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DMSx/OPS1 1 DMSx/OPS2 1 DMSx/OPS3 1 DMSx/OPS4 1 DMSx/OPS5 1 DMSx/OPS6 1 DMSx/OPS7 1 DMSx/OPS8 1 Field Bits Type 11:0 W DCC_DRA 11:0 W DCC_DRB 11:0 W DCC_ DRACL DCC_ 11:0 W DRBCL DCC_ 11:8 W DMSCL DCC_ 11:8 W ...
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Field Bits Type DCC_ 11:8 W DMS3 DCC_ 7:0 W DMSx/OPSx 12.3.2.1 DRx - Diagnosis Registers Contents DRA[1:0]x / DRB[1:0]x Diagnosis Register CHx Bank A and Bank DRA[1]6 DRA[0]6 DRA[1 ...
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Field Bits Type DRA[1:0]x / 1:0 R DRB[1:0]x 12.3.2.2 DRx - Return on DRx Commands x_DRx S_CS S_SI W S_SO Figure 41 SPI Feedback on x_DRx commands S_SO SPI_Serial Output PAR Field ...
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Each Cycle where a serial data or command frame is sent to the Serial Input [SI] of the SPI interface, a data frame is returned immediately by the Serial Output [SO]. The content of the SO frame is dependent of ...
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Field Bits Type DO[7:0] 7:0 R DO[7:6] 7:6 R Diag Register-2 Output Pin Feedback Output Pin Feedback OPF[7: OPF[7] OPF[6] OPF[5] Field Bits Type OPF[7:0] 15:8 R 12.3.3 OUTx - Output Control Register CHx The Output Control Register ...
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OUT10 OUT9 Field Bits Type OUTx[9:0] 9:0 R/W OUT[11:10] 11:10 R/W 12.3.4 ISx - INPUT or Serial Mode Control Register, Bank A and Bank B The INPUT or Serial Control Register [ ISx[1:0] ] allows ...
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Field Bits Type ISx[1:0] 11:0 ISAx R/W 7:0 ISBx 12.3.5 PMx - Parallel Mode Register CHx The Parallel Mode Register PMx[1] allows to “inform” the device about externally parallel connected output channels PMx bit is set, the “lower” ...
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RCP DBT2 DBT1 Field Bits Type RCP 11 R/W DBT2 10 R/W DBT1 9 DEVS[7:5] 7:5 R/W DEVS[4:3] 4:3 R/W DCCx 2:0 R/W Data Sheet Description RCP - Reverse ...
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Package Outlines 0. 0.65 = 11.05 2) 0.33 ±0.08 0. 12.8 -0.2 Index Marking Exposed Diepad Dimensions Package PG-DSO-36-24, -41, -42 PG-DSO-36-38 PG-DSO-36-38 PG-DSO-36-50 1) Does not include plastic or metal ...
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... Revision History TLE8110EE Revision History: 2011-05-26 Rev. 1.3.1 2011-05-26: Data Sheet Release New detailed description of device diagnosis in Load Clamping Energy measurement setup description added at Removed LOTC-bit configuration/functionality, Added Figure 22 Added Item 11.3.21, Chapter 12.3.2, added description of Diagnosis Clear/Read delays Chapter 12.2.3.4 TOR-bit Functionality Removed Package name generalized to PG-DSO-36 Rev ...
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... Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life ...