FAN3111C Fairchild Semiconductor, FAN3111C Datasheet - Page 12

• Manufacturer Part Number: FAN3111C
• Description: The FAN3111 1A gate driver is designed to drive an N-channel enhancement-mode MOSFET in low-side switching applications
• Manufacturer: Fairchild Semiconductor

© 2008 Fairchild Semiconductor Corporation
FAN3111 • Rev. 1.0.2
Applications Information
The FAN3111 offers CMOS- or logic-level-compatible
input thresholds. In the FAN3111C, the logic input
thresholds are dependent on the V
of 12V, the logic rising-edge threshold is approximately
55% of V
approximately
configuration
approximately 17% of V
used with relatively slow edges (approaching DC) if
good
incorporated in the system design to prevent noise from
violating the input-voltage hysteresis window. This
allows setting precise timing intervals by fitting an R-C
circuit between the controlling signal and the IN pin of
the driver. The slow rising edge at the IN pin of the
driver introduces a delay between the controlling signal
and the OUT pin of the driver.
In the FAN3111E, the input thresholds are dependent
on the V
and 5V. This range of V
TTL and other logic levels up to 5V by connecting the
XREF pin to the same source as the logic circuit that
drives the FAN3111E input stage. The logic rising edge
threshold is approximately 50% of V
falling-edge threshold is approximately 30% of V
The TTL-like input configuration offers a hysteresis
voltage of approximately 20% of V
Startup Operation
The FAN3111 internal logic is optimized to drive ground
referenced N-channel MOSFETs as V
rises during startup operation. As V
approximately 2V, the OUT pin is held LOW by an
internal resistor, regardless of the state of the input pins.
When
approximately 2V, the output assumes the state
commanded by the inputs.
Figure 35 illustrates FAN3111C startup operation with
V
commanded to the low level (IN+ and IN- tied to
ground). Note that OUT is held LOW to maintain an N-
channel MOSFET in the OFF state.
DD
increasing from 0 to 12V, with the output
Figure 35.
decoupling
the
XREF
VDD
DD
voltage that typically is chosen between 2V
FAN3111C
internal
and the input falling-edge threshold is
offers
OUT
38%
FAN3111C Startup Operation
and
of
circuitry
DD
a
XREF
. The CMOS inputs can be
V
bypass
DD
hysteresis
allows compatibility with
.
XREF
becomes
DD
The
DD
level and, with V
XREF
OUT @ 5 V/Div
VDD @ 5 V/Div
.
DD
techniques
rises from 0V to
t = 200 us/Div
supply voltage
CMOS
and the input
voltage
active
input
XREF
are
DD
of
at
.
12
Figure 36 illustrates startup operation as V
from 0 to 12V with the output commanded to the high
level (IN+ tied to VDD, IN- tied to GND). This
configuration might not be suitable for driving high-side
P-channel MOSFETs because the low output voltage of
the driver would attempt to turn the P-channel MOSFET
on with low V
Figure 37 illustrates FAN3111E startup operation with the
output commanded to the low level (IN+ tied to ground)
and the voltage on XREF ramped from 0 to 3.3V.
MillerDrive™ Gate Drive Technology
FAN3111 drivers incorporate the MillerDrive architecture
shown in Figure 38 for the output stage, a combination
of bipolar and MOS devices capable of providing large
currents over a wide range of supply-voltage and
temperature variations. The bipolar devices carry the
bulk of the current as OUT swings between 1/3 to 2/3
V
low rail.
The purpose of the MillerDrive architecture is to speed
up switching by providing the highest current during the
Miller plateau region when the gate-drain capacitance of
the MOSFET is being charged or discharged as part of
the turn-on / turn-off process. For applications with zero
voltage switching during the MOSFET turn-on or turn-off
interval, the driver supplies high peak current for fast
switching even though the Miller plateau is not present.
This situation often occurs in synchronous rectifier
applications because the body diode is generally
conducting before the MOSFET is switched on.
DD
Figure 36.
and the MOS devices pull the output to the high or
Figure 37.
XREF
VDD
DD
VDD
FAN3111C
levels.
Startup Operation as V
OUT
FAN3111E
OUT
FAN3111E Startup Operation
VDD @ 5 V/Div
VXREF @ 2 V/Div
OUT @ 5 V/Div
OUT @ 2 V/Div
VDD @ 5 V/Div
t = 200 us/Div
t = 50 us/Div
DD
Increases
DD
www.fairchildsemi.com
increases