IR3502BMPBF International Rectifier, IR3502BMPBF Datasheet - Page 17

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IR3502BMPBF

Manufacturer Part Number
IR3502BMPBF
Description
The IR3502B control IC combined with an XPHASE3 Phase IC provides a full featured and flexible way to implement a complete VR11.0 and VR11.1 power solution.
Manufacturer
International Rectifier
Datasheet

Specifications of IR3502BMPBF

Package
32-Lead MLPQ
Circuit
X-Phase Control IC
Switch Freq (khz)
250kHz to 1.5MHz
Pbf
PbF Option Available
Start-up Sequence
The IR3502B has a programmable soft-start function to limit the surge current during the converter start-up. A
capacitor connected between the SS/DEL and LGND pins controls soft start timing, over-current protection delay
and hiccup mode timing. A charge current of 52.5uA and discharge current of 4uA control the up slope and down
slope of the voltage at the SS/DEL pin respectively. Figure 9 depicts start-up sequence of converter with VR 11.1
VID. If there is no fault, as the ENABLE is asserted, the SS/DEL pin will start charging. The error amplifier output
EAOUT is clamped low until SS/DEL reaches 1.4V. The error amplifier will then regulate the converter’s output
voltage to match the SS/DEL voltage less the 1.4V offset until the converter output reaches the 1.1V boot voltage.
The SS/DEL voltage continues to increase until it rises above the 3.0V threshold of VID delay comparator. The VID
set inputs are then activated and VDAC pin transitions to the level determined by the VID inputs. The SS/DEL
voltage continues to increase until it rises above 3.92V and allows the PGOOD signal to be asserted. SS/DEL finally
settles at 4.0V, indicating the end of the soft start. The remote sense amplifier has a very low operating range of 50
mV in order to achieve a smooth soft start of output voltage without bump.
The VCCL under voltage lock-out, VID fault modes, over current, as well as a low signal on the ENABLE input
immediately sets the fault latch, which causes the EAOUT pin to drive low turning off the phase IC drivers. The
PGOOD pin also drives low and SS/DEL begin to discharge until the voltage reaches 0.2V. If the fault has cleared
the fault latch will be reset by the discharge comparator allowing a normal soft start to occur.
Other fault conditions, such as over voltage, open sense lines, open loop monitor, and open daisy chain, set
different fault latches, which start discharging SS/DEL, pull down EAOUT voltage and drive PGOOD low. However,
the latches can only be reset by cycling VCCL power.
Page 17 of 38
VDAC
+
-
VDAC
Buffer
Control IC
Remote
Sense
Amplifier
Thermal
Comp
Amplifier
Figure 8 Adaptive voltage positioning with thermal compensation.
100k
VSETPT
+
-
+
-
Error
Amplifier
200k
+
-
EAOUT
FB
IIN
VDAC
VDRP
DAC_BUFF
VN
VO
VOSEN+
VOSEN-
RTCMP1
RDRP
RTCMP3
RTCMP2
RFB
RTHERM
VDAC
VDAC
IOUT
IOUT
Phase IC
Phase IC
3k
3k
IR3502B
Current
Sense
Amplifier
Current
Sense
Amplifier
V3.2
+
+
-
-
CSIN+
CSIN+
CSIN-
CSIN-

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