IR3502MPBF International Rectifier, IR3502MPBF Datasheet - Page 13

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IR3502MPBF

Manufacturer Part Number
IR3502MPBF
Description
Complete VR11.0 or VR11.1 power solution.
Manufacturer
International Rectifier
Datasheet

Specifications of IR3502MPBF

Package
32-Lead MLPQ
Circuit
X-Phase Control IC
Switch Freq (khz)
250kHz to 1.5MHz
Pbf
PbF Option Available
IR3502 THEORY OF OPERATION
Block Diagram
The block diagram of the IR3502 is shown in Figure 7, and specific features are discussed in the following sections.
VID Control
The control IC allows the processor voltage to be set by a parallel eight bit digital VID bus. The VID codes set the
VDAC as shown in Table 1. The VID pins require an external bias voltage and should not be floated. The VID input
comparators monitor the VID pins and control the Digital-to-Analog Converter (DAC), whose output is sent to the
VDAC buffer amplifier. The output of the buffer amplifier is the VDAC pin. The VDAC voltage, input offsets of error
amplifier and remote sense differential amplifier are post-package trimmed to achieve 0.5% system set-point
accuracy for VID range between 1V to 1.6V. A set-point accuracy of ±5mV and ±8mV is achieved for VID ranges of
0.8V-1V and 0.5V-0.8V respectively. The actual VDAC voltage does not determine the system accuracy, which has
a wider tolerance.
The IR3502 can accept changes in the VID code while operating and vary the VDAC voltage accordingly. The slew
rate of the voltage at the VDAC pin can be adjusted by an external capacitor between VDAC pin and LGND pin. A
resistor connected in series with this capacitor is required to compensate the VDAC buffer amplifier. Digital VID
transitions result in a smooth analog transition of the VDAC voltage and converter output voltage minimizing inrush
currents in the input and output capacitors and overshoot of the output voltage.
Adaptive Voltage Positioning
Adaptive voltage positioning is needed to optimize the output voltage deviations during load transients and the
power dissipation of the load at heavy load. The circuitry related to voltage positioning is shown in Figure 8. The
output voltage is set by the reference voltage VSETPT at the positive input to the error amplifier. This reference
voltage can be programmed to have a constant DC offset below the VDAC by connecting RSETPT between VDAC
and VSETPT. The IVSETPT is controlled by the ROSC.
The average load current information for all the phases is fed back to the control IC through the IIN pin. As shown in
Figure 8, this information is thermally compensated with some gain by a set of buffer and thermal compensation
amplifiers to generate the voltage at the VDRP pin. The VDRP pin is connected to the FB pin through the resistor
R
additional current will flow into the FB pin equal to (VDRP-VDAC) / R
VDRP voltage increases accordingly. More current flows through the feedback resistor R
to have more droop. The positioning voltage can be programmed by the resistor R
produces the desired converter output impedance. The offset and slope of the converter output impedance are
referenced to and therefore independent of the VDAC voltage.
Inductor DCR Temperature Compensation
Remote Voltage Sensing
A negative temperature coefficient (NTC) thermistor should be used for inductor DCR temperature compensation.
The thermistor and tuning resistor network connected between the VN and VDRP pins provides a single NTC thermal
compensation. The thermistor should be placed close to the power stage to accurately reflect the thermal
performance of the inductor DCR. The resistor in series with the thermistor is used to reduce the nonlinearity of the
thermistor.
VOSEN+ and VOSEN- are used for remote sensing and connected directly to the load. The remote sense differential
amplifier with high speed, low input offset and low input bias current ensures accurate voltage sensing and fast
transient response. There is finite input current at both pins VOSEN+ and VOSEN- due to the internal resistor of the
differential amplifier. This limits the size of the resistors that can be used in series with these pins for acceptable
regulation of the output voltage.
DRP
. Since the error amplifier will force the loop to maintain FB to be equal to the VDAC reference voltage, an
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DRP
. When the load current increases, the
DRP
so that the droop impedance
FB
July 28, 2009
and causes the output
IR3502

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