HCPL3120000E AVAGO TECH, HCPL3120000E Datasheet - Page 24

• Manufacturer Part Number: HCPL3120000E
• Manufacturer: AVAGO TECH

V
V
IPM Dead Time and
Propagation Delay
Specifications.
applies to HCPL-3120, HCPL-
J312, and HCNW3120)
The HCPL-3120 includes a
Propagation Delay Difference
(PDD) specification intended to
help designers minimize “dead
time” in their power inverter
Figure 35. Minimum LED Skew for Zero Dead Time.
Figure 37. Thermal Derating Curve, Dependence of Safety Limiting Value
with Case Temperature per VDE 0884.
I
I
OUT1
OUT2
LED1
LED2
*PDD = PROPAGATION DELAY DIFFERENCE
NOTE: FOR PDD CALCULATIONS THE PROPAGATION DELAYS
ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS.
800
700
600
500
400
300
200
100
0
0
HCPL-3120 OPTION 060/HCPL-J312
T
25
S
– CASE TEMPERATURE – °C
50
P
I
OPTION 060
I
75 100
S
S
S
(mA) FOR HCPL-3120
(mA) FOR HCPL-J312
(mW)
PDD* MAX = (t
t
PHL MAX
(Discussion
Q2 OFF
125
Q1 ON
150 175
t
PLH MIN
PHL
- t
200
PLH
)
MAX
designs. Dead time is the time
period during which both the
high and low side power
transistors (Q1 and Q2 in Figure
25) are off. Any overlap in Q1
and Q2 conduction will result in
large currents flowing through
the power devices between the
high and low voltage motor rails.
= t
Q1 OFF
Q2 ON
1000
PHL MAX
900
800
700
600
500
400
300
200
100
0
0
T
25
S
- t
– CASE TEMPERATURE – °C
PLH MIN
50
P
I
S
HCNW3120
S
(mA)
(mW)
75
*PDD = PROPAGATION DELAY DIFFERENCE
NOTE: FOR DEAD TIME AND PDD CALCULATIONS ALL PROPAGATION
DELAYS ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS.
Figure 36. Waveforms for Dead Time.
V
V
100
I
I
OUT1
OUT2
LED1
LED2
125
150
175
(t
PHL-
PDD* MAX
Q1 ON
Q2 OFF
t
t
PHL MIN
PHL MAX
t
PLH
)
MAX
MAXIMUM DEAD TIME
(DUE TO OPTOCOUPLER)
= (t
= (t
= PDD* MAX – PDD* MIN
PHL MAX
PHL MAX
t
MIN
PLH
t
PLH MAX
- t
- t
PHL MIN
PLH MIN
) + (t
) – (t
Q1 OFF
PLH MAX
PHL MIN
Q2 ON
- t
- t
PLH MAX
PLH MIN
)
)