APE3312GN3 Advanced Power Electronics Corp., APE3312GN3 Datasheet - Page 19

APE3312GN3

Manufacturer Part Number
APE3312GN3
Description
Manufacturer
Advanced Power Electronics Corp.
Datasheet

Specifications of APE3312GN3

Vin(min)
3
Vin(max)
28
Vout(min)
0.75
Vout(max)
5.5
Iout(max)
8
Power Good
?
Otp
?
Ocp
?
Ovp
?
Package
DFN 3x3-10L

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
APE3312GN3-C
Manufacturer:
APEC/富鼎
Quantity:
20 000
APPLICATION INFORMATION (Continued)
Layout Considerations
The switching power stages require more attention in PCB layout. Keep the high current paths short.
Separate the ground terminals. Four-layer board is recommended. Use two middle layers as ground planes,
with interconnections between top and bottom layers as needed. Below lists help start layout work.
1. Minimize the resistance by keeping the power component group together with short and wide trace (60mil
2. Minimize the high-side path with short and wide trace. This path starts at VIN, goes through the high-side
3. Minimize the low-side high current path. The high current path starts at the ground of the low-side
4. Power components should be grouped together near the gate drivers. Connect the drivers of DRVH and
5. Place feedback resistors R1 and R2 near VFB and GND pin with short wire and should be far away to the
6. Keep sensitive analog node (VFB, TRIP, and RF) away from high-speed switching loop to avoid noise
7. The current limit setting resistor, R
8. The frequency setting resistor, R
9. Group the analog ground connection of the V5IN (V5FILT) bypass capacitors, VFB, RF, and TRIP.
10. Group the power ground connection of the VIN capacitor, VOUT capacitor, and the source of the low-side
11. PGND is used as the positive current sensing node so PGND should be connected to the source terminal
12. Use plane connection between GND (analog ground) and PGND (power ground) near the IC.
at least).
MOSFET, through the inductor, through the output capacitor, through the input capacitor, and back to the
input.
MOSFET, goes through the low-side MOSFET, through the inductor, through the output capacitor, and
back to the ground of the low-side MOSFET.
DRVL close to the gate of high-side and low-side MOSFET with short trace as possible to reduce stray
inductance.
noise source, such as switching loop. Use ground plane to shield feedback trace from power components.
coupling.
Connect the analog ground plane directly to GND pin of the IC.
MOSFETs as close as possible. Connect this power ground plane directly to PGND pin of the IC.
of the bottom MOSFET.
Advanced Power
Electronics Corp.
RF
TRIP
, should next to the IC.
, should connect to TRIP and GND pin directly, next to the IC.
APE3312
19

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