MAX9218 Maxim, MAX9218 Datasheet
MAX9218
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MAX9218 Summary of contents
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... ESD tolerance is specified for ISO 10605 with ±10kV contact discharge and ±30kV air discharge. The MAX9218 operates from a +3.3V core supply and features a separate output supply for interfacing to 1.8V to 3.3V logic-level inputs. This device is available in 48- lead Thin QFN and LQFP packages and is specified from -40° ...
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... Thin QFN (derate 37mW/°C above +70°C) .2963mW Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...
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DC ELECTRICAL CHARACTERISTICS (continued) = +3.0V to +3.6V, PWRDWN = high, differential input voltage ⏐V (V CC_ - ⏐ /2⏐ -40°C to +85°C, unless otherwise noted. Typical values are ...
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... V and Note 2: Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production tested +25°C. A Note 3: All LVTTL/LVCMOS inputs, except PWRDWN at ≤ 0.3V or ≥ V Note 4: AC parameters are guaranteed by design and characterization, and are not production tested. Limits are set at ±6 sigma. ...
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C = 8pF +25°C, unless otherwise noted WORST-CASE PATTERN SUPPLY CURRENT vs. FREQUENCY FREQUENCY (MHz) OUTPUT TRANSITION TIME ...
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DC-Balanced LVDS Deserializer PIN NAME Rising or Falling Latch Edge Select. LVTTL/LVCMOS input. Selects the edge of PCLK_OUT for latching data into the next chip. Set R/F = high for a rising latch edge. Set R/F = low ...
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... RISING LATCH EDGE SHOWN (R/F = HIGH). Figure 2. Worst-Case Output Pattern _______________________________________________________________________________________ 27-Bit, 3MHz-to-35MHz DC-Balanced LVDS Deserializer 1 DC BALANCE/ SER-TO-PAR 0 DECODE MAX9218 DE_OUT LOCK LVDS RECEIVER PCLK_OUT RGB_OUT[17:0] CNTL_OUT[8:0] Figure 3. Output Rise and Fall Times PCLK_OUT Figure 4. High and Low Times ...
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DC-Balanced LVDS Deserializer PCLK_OUT PCLK_OUT SHOWN FOR R/F = HIGH (RISING LATCH EDGE) DE_OUT LOCK RGB_OUT[17:0] CNTL_OUT[8:0] Figure 5. Synchronous Output Timing 20 SERIAL BITS SERIAL-WORD N IN+, IN- PCLK_OUT CNTL_OUT RGB_OUT Figure 6. Deserializer Delay 8 _______________________________________________________________________________________ ...
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PWRDWN REFCLK HIGH IMPEDANCE PCLK_OUT RGB_OUT CNTL_OUT HIGH IMPEDANCE DE_OUT HIGH IMPEDANCE LOCK NOTE: R/F = HIGH Figure 7. PLL Lock to REFCLK and Power-Down Delay OUTEN 0. DE_OUT LOCK RGB_OUT[17:0] HIGH-Z CNTL_OUT[8:0] Figure 8. Output Enable ...
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... AC-coupling blocks low-frequency ground shifts and common-mode noise. The MAX9217 serializer can also be DC-coupled to the MAX9218 deserializer. Figure 10 is the AC-coupled serializer and deserializer with two capacitors per link, and Figure 11 is the AC-coupled serializer and deseri- alizer with four capacitors per link ...
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... IN OUT 82Ω 82Ω CMF RNG0 RNG1 100Ω DIFFERENTIAL STP CABLE R/F OUTEN 1 RGB_OUT CNTL_OUT 0 DE_OUT PCLK_OUT PLL REFCLK PWRDWN TIMING AND CONTROL LOCK MAX9218 R/F OUTEN 1 RGB_OUT CNTL_OUT 0 DE_OUT PCLK_OUT PLL REFCLK PWRDWN TIMING AND CONTROL LOCK MAX9218 11 ...
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... Frequency Range Setting (RNG[1:0]) The RNG[1:0] inputs select the operating frequency range of the MAX9218 and the transition time of the out- puts. Select the frequency range that includes the MAX9217 serializer PCLK_IN frequency. Table 3 shows the selectable frequency ranges and the corresponding data rates and output transition times ...
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... Data Enable Output (DE_OUT) The MAX9218 deserializes video and control data at dif- ferent times. Control data is deserialized during the video blanking time. DE_OUT high indicates that video data is being deserialized and output on RGB_OUT[17:0]. ...
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... DC-Balanced LVDS Deserializer The MAX9218 ESD tolerance is rated for the Human Body Model, Machine Model, and ISO 10605. ISO 10605 specifies ESD tolerance for electronic systems 1MΩ 1.5kΩ CHARGE-CURRENT- DISCHARGE LIMIT RESISTOR RESISTANCE HIGH- C STORAGE VOLTAGE S 100pF ...
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... Added automotive qualified part to Ordering Information Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15 © ...