MAX3816ACUE+ Maxim Integrated Products, MAX3816ACUE+ Datasheet - Page 7

• Manufacturer Part Number: MAX3816ACUE+
• Description: IC I2C 2WIRE EXTENDER 16-TSSOP
• Manufacturer: Maxim Integrated Products
• Type: DDC (Digital Down Converter) Extenderr

Specifications of MAX3816ACUE+

• Applications: HD Displays, DVI/HDMI
• Mounting Type: Surface Mount
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3) Low state. Level sensing off (Holdoff).
4) Low state, drivers off. Level sensing on.
5) Low-to-high transition. Drivers on. Level sensing
6) High state. Drivers off. Level sensing off
meter (> 3000pF) cable with a controlled slew-rate.
Similarly, the display side is pulled down to V
a controlled slew rate, open-drain n-channel MOS
device. These buffers stay on for 1.75µs.
Level sensing remains off until the completion of the
holdoff period, which is 2.5µs on both the clock and
data channels.
In series mode, drivers maintain low level (at or
below V
the level below V
level at V
is pulling down. This action is in support of the
“wired-AND” function across source and display
sides.
After the MAX3816A holdoff time completes, level
sensing resumes.
In series mode, the MAX3816A supports a “wired-
AND” connection between source and display
sides; returning to the high state is supported only
when all client sources turn off. If either the source
or display side releases the bus, but not both, a
MAX3816A level-sensing buffer senses the transi-
tion at V
clamping the voltage to V
remaining side to release the bus.
off (Holdoff).
A change of state is initiated when no device is
holding the bus low on both source and display
sides. When both sides exceed their respective
V
controlled open-drain p-channel device, pulling up
to V
is released and the pullup resistors pull the display-
side bus up to V
(Holdoff).
During holdoff, no transitions are sensed. The high
state is maintained by external pullup resistors. Upon
the end of holdoff, when the cable and display levels
are above 85%, the state machine transitions to state
(1); otherwise, it waits until levels raise above 85% to
transition to state (1). Data, but not clock, has anoth-
er exit from state (6) to (1) upon data source or data
display levels dropping below 60%.
TRIGIL
CC
for 1.75µs. Simultaneously, the display side
levels, the source side turns on a slew-rate
HOLD
TRIGIL
HOLD
). Either the client pulldowns sustain
, supporting the existing low state by
_______________________________________________________________________________________
if no other driver on the same node
DD
OL
, as per normal I
, or the MAX3816A sustains the
HOLD
I
2
C 2-Wire Extender for DDC in DVI,
and waiting for the
2
C operation.
SS
with
HDMI, and VGA Interfaces
I
ed for the MAX3816A. The MAX3816A is optimized for
DDC applications with a noncontinuous clock.
The MAX3816A DDC/I
two controllers with level-shifters, cable drivers, display
drivers, and level-sensing circuitry (Figure 2).
The MAX3816A functionality is governed by two con-
trollers, one for CLOCK and one for DATA. Bidirectional
signaling is fully supported on both CLOCK and DATA.
The primary function of the controllers is to receive the
state-change information from the source- and display-
side level-sense circuitry and support the “wired-AND”
function between the two. When the state changes, a
holdoff period is timed during which the source and
display drivers assert the next state, high or low, and all
input sensing is ignored while I/O transients settle
(Figure 3). The holdoff period is approximately 2.5µs.
The cable transmission-line termination feature is active
only during the first 1.75µs of holdoff, sufficiently long
enough to absorb roundtrip reflections from a 60m
cable.
In series mode, the CLOCK and DATA controllers iso-
late the source electronics from the display electronics.
The cable side of the MAX3816A is referenced to V
and GND_REF, and the display side is referenced to
V
offset and noise between the source and display
devices.
The low-impedance cable drivers (Figure 10) can
charge and discharge at least 3000pF of capacitive
cable load within the I
drivers each incorporate a slew-rate limiter to control
the amount of high-frequency energy transmitted. The
cable drivers also provide a back termination imped-
ance of approximately 60Ω to absorb transmission-line
reflections returning to the driver. The cable drivers
each include a high-state current-limiting feature to
clamp the output current to less than 16mA.
After 1.75µs of driver assertion, following a decision to
transition, the low-impedance drivers are turned off.
Subsequently, when another device asserts a new
state, it does not have to work against the low imped-
ance of the MAX3816A.
2
DD
C continuous clock applications are not recommend-
and V
SS
. This power scheme provides tolerance to
Controllers and Level Shifters
Detailed Description
2
2
C rise and fall time limits. The
C 2-wire extender consists of
Cable Drivers
CC
7