71M6543G Maxim, 71M6543G Datasheet - Page 9

• Manufacturer Part Number: 71M6543G
• Description: The 71M6543F/71M6543H are Teridian's 4th-generation polyphase metering system-on-chips (SoCs) with a 5MHz, 8051-compatible MPU core, low-power real-time clock (RTC) with digital temperature compensation, flash memory, and LCD driver
• Manufacturer: Maxim

v1.2
VADC 10 ( VC )
VADC 8 ( VA )
VADC 9 ( VB )
SEGDIO 51 /
SEGDIO 55
WPULSE /
OPT _ TX /
OPT _ RX /
VPULSE
IADC 0
IADC 1
IADC 2
IADC 3
IADC 4
IADC 5
IADC 6
IADC 7
TEST
XOUT
XIN
RX
TX
MODE
TEST
INTERFACE
MUX
UART 0
OPTICAL
MUX CTRL
Oscillator
PREAMP
CLOCK GEN
32 KHz
POWER FAULT
MUX
and
DETECTION
VBIAS
CE CONTROL
4 . 9 MHz
CROSS
RTCLK ( 32 KHz )
CK 32
< 4 . 9 MHz
< 4 . 9 MHz
MUX _ SYNC
CKCE
CKMPU
CK _ 4 X
© 2008–2011 Teridian Semiconductor Corporation
CKMPU _ 2 x
WAKE
FAULTZ
VBIAS
VREF
VSTAT
Figure 1: IC Functional Block Diagram
STRT
32 - bit Compute
RESET
VREF
( 80515 )
_
Y
S
U
B
E
C
MPU
MCK
Engine
PLL
MPU _ RSTZ
CE
Y
S
U
B
R
E
F
X
V 3 P 3 A
4 . 9 MHZ
VBIAS
32 KHz
CK 32
INTERFACE
EEPROM
SDOUT
SDCK
SDIN
0 x 0000 ... 0 xFFFF
CKMPU _ 2 x
RTM
WPULSE
VARPULSE
+
0 x 000 ... 0 x 3 FF
-
0 x 0000 ... 0 xFFFF
E _ RXTX / SEG 48
E _ TCLK / SEG 49
VREF
PROGRAM
ADC
DIV
AD CONVERTER
DATA
E _ RST / SEG 50
16
8
CKADC
8
PROG
∆Σ_
32
MPU RAM
0 x 000 ... 0 x 2 FF
( 5 KB )
CEDATA
EMULATOR
MEMORY
3
PORT
SHARE
71M6543F/H and 71M6543G/GH Data Sheet
CKFIR
V 3 P 3 A
E _ RXTX
E _ TCLK
E _ RST ( Open Drain )
0 x 0000 ... 0 x 13 FF
0 x 2000 ... 0 x 20 FF
8
VARPULSE
8
FIR
WPULSE
0 x 00000 …
MEMORY SHARE
0 X1FFFF
17
MUX
GNDA
M
A
R
O
I /
FLASH 128 KB
ICE _ E
22
GNDD
P I
S
RTM
CONFIGURATION
CONFIGURATION
LCD DRIVER
PARAMETERS
FIGURATION
Voltage
VLCD
LCD _ GEN
DIGITAL I / O
Non - Volatile
VLCD
Boost
( I / O RAM )
TEST MUX
CON -
RAM
RAM
RTC
2 . 5 V to logic
V 3 P 3 SYS
Regulator
Voltage
VLC 2
VLC 1
VLC 0
TEST MUX
9 / 20 / 2010
SENSOR
6
RTCLK
TEST
TEMP
BAT
2
2
SEGDIO Pins
SEG Pins
COM 0 .. 5
PB
VBAT
VDD
V 3 P 3 D
VBAT _ RTC
9