ST72324J6 STMicroelectronics, ST72324J6 Datasheet - Page 35

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ST72324J6

Manufacturer Part Number
ST72324J6
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72324J6

Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator, clock security system and bypass for external clock
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
16-bit Timer A With
1 input capture, 1 output compare, external clock input, PWM and pulse generator modes
16-bit Timer B With
2 input captures, 2 output compares, PWM and pulse generator modes
INTERRUPTS (Cont’d)
Table 7. Dedicated Interrupt Instruction Set
Note: During the execution of an interrupt routine, the HALT, POPCC, RIM, SIM and WFI instructions change the current
software priority up to the next IRET instruction or one of the previously mentioned instructions.
Instruction
HALT
IRET
JRM
JRNM
POP CC
RIM
SIM
TRAP
WFI
Entering Halt mode
Interrupt routine return
Jump if I1:0=11 (level 3)
Jump if I1:0<>11
Pop CC from the Stack
Enable interrupt (level 0 set)
Disable interrupt (level 3 set)
Software trap
Wait for interrupt
New Description
Pop CC, A, X, PC
I1:0=11?
I1:0<>11?
Mem => CC
Load 10 in I1:0 of CC
Load 11 in I1:0 of CC
Software NMI
Function/Example
I1
I1
I1
1
1
1
1
1
ST72324Jx ST72324Kx
H
H
H
I0
I0
I0
0
0
1
1
0
N
N
N
Z
Z
Z
35/164
C
C
C
1

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