IP4294CZ10-TBR NXP Semiconductors, IP4294CZ10-TBR Datasheet
IP4294CZ10-TBR
Available stocks
Related parts for IP4294CZ10-TBR
IP4294CZ10-TBR Summary of contents
Page 1
... IP4294CZ10-TBR ESD protection for ultra high-speed interfaces Rev. 2 — 29 February 2012 1. Product profile 1.1 General description The device is designed to protect high-speed interfaces such as SuperSpeed USB, High-Definition Multimedia Interface (HDMI), DisplayPort, external Serial Advanced Technology Attachment (eSATA) and Low Voltage Differential Signaling (LVDS) interfaces against ElectroStatic Discharge (ESD) ...
Page 2
... TMDS_CH2 negative channel 2 5 TMDS_CH2+ positive channel 2 6 n.c. 7 n.c. 8 GND 9 n.c. 10 n.c. 3. Ordering information Table 2. Type number IP4294CZ10-TBR XSON10 4. Marking Table 3. Type number IP4294CZ10-TBR 5. Limiting values Table 4. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol ESD T amb T ...
Page 3
... V mutual line capacitance MHz; V dynamic resistance surge 1.0 A TLP positive transient channel I PP clamping voltage All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 February 2012 IP4294CZ10-TBR ESD protection for ultra high-speed interfaces Min = [ 2.5 V bias ...
Page 4
... Preliminary data sheet 018aaa202 (1) ( (MHz) Fig 2. 018aaa204 200 250 300 t (ns) Fig 4. All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 February 2012 IP4294CZ10-TBR ESD protection for ultra high-speed interfaces 1.01 a 0.99 0.97 0.95 0. line --------------------------------------- - ...
Page 5
... Preliminary data sheet 018aaa206 (A) Fig 6. 018aaa209 (V) CL Fig 8. All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 February 2012 IP4294CZ10-TBR ESD protection for ultra high-speed interfaces 3.75 CL (V) 3.00 2.25 1.50 0.75 0. 8/20 s; negative pulse IEC 61000-4- Dynamic resistance with negative clamping ...
Page 6
... Preliminary data sheet IP4294CZ10-TBR 8 IP4294CZ10-TBR IP4221CZ6 Application diagram of HDMI ESD protection using IP4294CZ10-TBR All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 February 2012 IP4294CZ10-TBR ESD protection for ultra high-speed interfaces TMDS_D2+ TMDS_CH2+ 5 TMDS_GND TMDS_CH2– 4 TMDS_D2– ...
Page 7
... 2.6 1.1 0.40 0.45 2.5 1.0 0.5 2 0.35 0.40 2.4 0.9 0.2 0.30 0.35 References JEDEC JEITA - - - - - - All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 February 2012 IP4294CZ10-TBR ESD protection for ultra high-speed interfaces detail 0.1 0.05 0.05 0.05 European projection SOT1176 sot1176-1_po Issue date ...
Page 8
... NXP Semiconductors 9. Revision history Table 6. Revision history Document ID Release date IP4294CZ10-TBR v.2 20120229 • Modifications: Table C • Table • Figure • Figure • Section 10 “Legal IP4294CZ10-TBR v.1 20111125 IP4294CZ10-TBR Preliminary data sheet Data sheet status Preliminary data sheet ; C 5: parameters C and line(mutual) and ...
Page 9
... All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 February 2012 IP4294CZ10-TBR © NXP B.V. 2012. All rights reserved ...
Page 10
... NXP Semiconductors’ product specifications. 10.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 2 — 29 February 2012 IP4294CZ10-TBR © NXP B.V. 2012. All rights reserved ...
Page 11
... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2012. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Document identifier: IP4294CZ10-TBR All rights reserved. Date of release: 29 February 2012 ...