ADP322 Analog Devices, ADP322 Datasheet

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ADP322

Manufacturer Part Number
ADP322
Description
Triple, 200 mA, Low Noise, High PSRR Voltage Regulator
Manufacturer
Analog Devices
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADP322ACPZ-135-R7
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Data Sheet
FEATURES
Fixed (ADP322) and adjustable output (ADP323) options
Bias voltage range (VBIAS): 2.5 V to 5.5 V
LDO input voltage range (VIN1/VIN2, VIN3): 1.8 V to 5.5 V
Three 200 mA low dropout voltage regulators (LDOs)
16-lead, 3 mm × 3 mm LFCSP
Initial accuracy: ±1%
Stable with 1 μF ceramic output capacitors
No noise bypass capacitor required
3 independent logic controlled enables
Overcurrent and thermal protection
Key specifications
Excellent transient response
Low dropout voltage: 110 mV at 200 mA load
85 μA typical ground current at no load, all LDOs enabled
100 μs fast turn-on circuit
Guaranteed 200 mA output current per regulator
−40°C to +125°C junction temperature
APPLICATIONS
Mobile phones
Digital cameras and audio devices
Portable and battery-powered equipment
Portable medical devices
Post dc-to-dc regulation
GENERAL DESCRIPTION
The ADP322/ADP323 200 mA triple output LDOs combine high
PSRR, low noise, low quiescent current, and low dropout voltage
to extend the battery life of portable devices and are ideally
suited for wireless applications with demanding performance
and board space requirements.
The ADP322/ADP323 PSRR is greater than 60 dB for frequencies
as high as 100 kHz while operating with a low headroom voltage.
The ADP322/ADP323 offer much lower noise performance
than competing LDOs without the need for a noise bypass
capacitor.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
High PSRR
Low output noise
76 dB PSRR up to 1 kHz
70 dB PSRR at 10 kHz
60 dB PSRR at 100 kHz
40 dB PSRR at 1 MHz
29 μV rms typical output noise at V
55 μV rms typical output noise at V
OUT
OUT
= 1.2 V
= 2.8 V
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
2.5V TO
1.8V TO
1.8V TO
The ADP322/ADP323 are available in a miniature 16-lead,
3 mm × 3 mm LFCSP package and are stable with tiny 1 μF
±30% ceramic output capacitors providing the smallest possible
board area for a wide variety of portable power needs.
The ADP322 is available in output voltage combinations ranging
from 0.8 V to 3.3 V and offers overcurrent and thermal protection
to prevent damage in adverse conditions. The APDP323
adjustable triple LDO can be configured for any output voltage
between 0.5 V and 5 V with two resistors for each output.
High PSRR Voltage Regulator
5.5V
5.5V
5.5V
2.5V TO
1.8V TO
1.8V TO
5.5V
5.5V
5.5V
VBIAS
VIN1/VIN2
VIN3
Triple, 200 mA, Low Noise,
VBIAS
VIN1/VIN2
VIN3
TYPICAL APPLICATION CIRCUITS
Figure 1. Typical Application Circuit for ADP322
Figure 2. Typical Application Circuit for ADP323
+
+
+
1µF
1µF
1µF
©2010–2011 Analog Devices, Inc. All rights reserved.
+
+
+
1µF
1µF
1µF
EN1
EN2
EN3
EN1
EN2
EN3
OFF
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
ON
ON
ON
ADP322/ADP323
ADP323
ADP322
EN LD1
EN LD2
EN LD3
EN LD1
EN LD2
EN LD3
VBIAS
LDO 1
VBIAS
LDO 2
VBIAS
LDO 3
VBIAS
VBIAS
VBIAS
LDO 1
LDO 2
LDO 3
GND
GND
www.analog.com
FB1
FB2
FB3
VOUT1
VOUT2
VOUT3
+
+
+
1µF
1µF
1µF
VOUT1
VOUT2
VOUT3
+
+
+
1µF
1µF
1µF

Related parts for ADP322

ADP322 Summary of contents

Page 1

... The ADP322/ADP323 PSRR is greater than 60 dB for frequencies as high as 100 kHz while operating with a low headroom voltage. The ADP322/ADP323 offer much lower noise performance than competing LDOs without the need for a noise bypass capacitor ...

Page 2

... ADP322/ADP323 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Typical Application Circuits............................................................ 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Input and Output Capacitor, Recommended Specifications.. 4 Absolute Maximum Ratings............................................................ 5 Thermal Resistance ...................................................................... 5 ESD Caution.................................................................................. 5 Pin Configurations and Function Descriptions ........................... 6 Typical Performance Characteristics ............................................. 8 REVISION HISTORY 9/11—Rev.0 to Rev. A Added Figure 2, Renumbered Sequentially .................................. 1 Changes to Theory of Operation Section ...

Page 3

... LDO OUT OUT V = 0.8 V OUT V = 3.3 V, one V initially on, enable second or OUT OUT third LDO V = 0.8 V OUT T rising SD J SD-HYS Rev Page ADP322/ADP323 , BIAS OUT1 OUT2 OUT3 Min Typ 2.5 1.8 85 120 250 66 0.1 = −40°C to +125°C 0.01 −1 − ...

Page 4

... ADP322/ADP323 Parameter Symbol EN INPUT EN Input Logic High Input Logic Low Input Leakage Current V I-LEAKAGE UNDERVOLTAGE LOCKOUT UVLO Input Bias Voltage (VBIAS) UVLO Rising Input Bias Voltage (VBIAS) UVLO Falling Hysteresis UVLO OUTPUT NOISE OUT POWER SUPPLY REJECTION RATIO PSRR 1 Accuracy when VOUTx is connected directly to FBx ...

Page 5

... THERMAL DATA Absolute maximum ratings apply individually only, not in combination. The ADP322/ADP323 triple LDO can be damaged when the junction temperature limits are exceeded. Monitoring ambient temperature does not guarantee that the junction temperature ( within the specified temperature limits. In applications ...

Page 6

... ADP322/ADP323 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Table 5. ADP322 Pin Function Descriptions Pin No. Mnemonic Description 1 EN1 Enable Input for Regulator 1. Drive EN1 high to turn on Regulator 1; drive it low to turn off Regulator 1. For automatic startup, connect EN1 to VBIAS. 2 VBIAS Input Voltage Bias Supply. Bypass VBIAS to GND with a 1 μF or greater capacitor. ...

Page 7

... Exposed pad for enhanced thermal performance. Connect to copper ground plane. EN1 1 12 GND VBIAS ADP323 VIN1/VIN2 3 10 VIN3 FB1 4 9 FB3 TOP VIEW (Not to Scale) NOTES CONNECT. 2. CONNECT EXPOSED PAD TO GROUND PLANE. Figure 4. ADP323 Pin Configuration Rev Page ADP322/ADP323 ...

Page 8

... ADP322/ADP323 TYPICAL PERFORMANCE CHARACTERISTICS 3 IN1 IN2 IN3 BIAS OUT1 enable voltage 25°C, unless otherwise noted. A 3.33 LOAD = 1mA LOAD = 5mA LOAD = 10mA 3.32 LOAD = 50mA LOAD = 100mA LOAD = 200mA 3.31 3.30 3.29 3.28 3.27 –40 – (°C) J Figure 5. Output Voltage vs. Junction Temperature 3 ...

Page 9

... V (V) IN Figure 13. Output Voltage vs. Input Voltage 85 125 Figure 14. Ground Current vs. Junction Temperature, Single Output Loaded 100 1000 4.20 4.60 5.00 5.40 Figure 16. Ground Current vs. Input Voltage, Single Output Loaded Rev Page ADP322/ADP323 140 120 100 –40 – (°C) J 120 100 80 60 ...

Page 10

... ADP322/ADP323 350 300 250 200 150 100 50 0 –40 – (°C) J Figure 17. Ground Current vs. Junction Temperature, All Outputs Loaded Equally 300 250 200 150 100 TOTAL LOAD CURRENT (mA) Figure 18. Ground Current vs. Load Current, All Outputs Loaded Equally 300 ...

Page 11

... IN Figure 25. Output Voltage vs. Input Voltage (in Dropout 3.3 V OUT1 75 100 125 Figure 26. Ground Current vs. Input Voltage (in Dropout), V 100 1000 3.40 3.45 3.50 Rev Page ADP322/ADP323 350 300 250 200 150 100 LOAD = 1mA LOAD = 5mA LOAD = 10mA 50 LOAD = 50mA LOAD = 100mA LOAD = 200mA 0 3.10 3 ...

Page 12

... ADP322/ADP323 160 140 120 100 80 60 LOAD = 1mA 40 LOAD = 5mA LOAD = 10mA LOAD = 50mA 20 LOAD = 100mA LOAD = 200mA 0 1.70 1.80 1.90 V (V) IN Figure 29. Ground Current vs. Input Voltage (in Dropout 200mA 100mA –10 10mA 1mA –20 –30 –40 –50 –60 –70 –80 –90 –100 ...

Page 13

... CH2 = V LOAD1 10 100 1000 = 5 V Figure 38. Load Transient Response CH1 44mA = 1 mA, LOAD3 , CH4 = V OUT2 OUT3 A CH1 124mA = 1 μF, OUT1 Rev Page ADP322/ADP323 I LOAD2 1 V OUT2 2 CH1 200mA Ω 50mV B M40µs A CH1 B CH2 10. 200 mA, C LOAD2 ...

Page 14

... ADP322/ADP323 OUT1 2 V OUT2 3 V OUT3 4 CH1 1V CH2 10mV B M2µ 10mV B 10mV B CH3 CH4 T 12 Figure 41. Line Transient Response LOAD1 LOAD2 CH1 = V , CH2 = V , CH3 = V IN OUT1 OUT2 A CH1 4.58V =1 mA, LOAD3 ...

Page 15

... VOUT3 VIN3 GND OVERCURRENT Figure 43. ADP322 Internal Block Diagram The ADP323 differs from the ADP322 except in that the output voltage dividers are internally disconnected and the feedback inputs of the error amplifiers are brought out for each output. VIN1/VIN2 OVERCURRENT INTERNAL BIAS ...

Page 16

... If an output capacitance greater than 1 μF is required, the input capacitor should be increased to match it. Input and Output Capacitor Properties Any good quality ceramic capacitor can be used with the ADP322/ ADP323, as long as the capacitor meets the minimum capacit- ance and maximum ESR requirements. Ceramic capacitors are manufactured with a variety of dielectrics, each with a different behavior over temperature and applied voltage ...

Page 17

... The ADP322/ADP323 use an internal soft start to limit the inrush current when the output is enabled. The start-up time for the 2.8 V option is approximately 220 μs from the time the ENx active threshold is crossed to when the output reaches 90% of its final value. The start-up time is somewhat dependent on the output voltage setting and increases slightly as the output voltage increases ...

Page 18

... Consider the case where a hard short from VOUTx to GND occurs. At first, the ADP322/ADP323 limits current so that only 300 mA is conducted into the short. If self-heating of the junction is great enough to cause its temperature to rise above 155°C, thermal shutdown activates, turning off the output and reducing the output current to zero ...

Page 19

... Figure 53. Junction Temperature vs. Total Power Dissipation 1000mm 2 500mm 2 100mm 2 50mm JEDEC T MAX J 0.8 1.0 1.2 = 50°C Figure 54. Junction Temperature vs. Total Power Dissipation and A Rev Page ADP322/ADP323 140 120 100 0.2 0.4 0.6 0.8 TOTAL POWER DISSIPATION (W) 140 120 100 ...

Page 20

... CONSIDERATIONS Heat dissipation from the package can be improved by increasing the amount of copper attached to the pins of the ADP322/ADP323. However, as can be seen from Table 7, a point of diminishing returns is eventually reached, beyond which an increase in the copper size does not yield significant heat dissipation benefits. ...

Page 21

... ADP322ACPZ-145-R7 −40°C to +125°C ADP322ACPZ-155-R7 −40°C to +125°C ADP322ACPZ-165-R7 −40°C to +125°C ADP322ACPZ-175-R7 −40°C to +125°C ADP322ACPZ-189-R7 −40°C to +125°C ADP323ACPZ-R7 −40°C to +125°C ADP322CP-EVALZ ADP323CP-EVALZ ADP322CPZ-REDYKIT RoHS Compliant Part. ...

Page 22

... ADP322/ADP323 NOTES Rev Page Data Sheet ...

Page 23

... Data Sheet NOTES Rev Page ADP322/ADP323 ...

Page 24

... ADP322/ADP323 NOTES ©2010–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09288-0-9/11(A) Rev Page Data Sheet ...

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