AD7715 Analog Devices, AD7715 Datasheet - Page 17
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AD7715
Manufacturer Part Number
AD7715
Description
Manufacturer
Analog Devices
Datasheet
1.AD7715.pdf
(40 pages)
Specifications of AD7715
Resolution (bits)
16bit
# Chan
1
Sample Rate
19.2kSPS
Interface
Ser,SPI
Analog Input Type
Diff-Bip,Diff-Uni
Ain Range
(Vref/PGA Gain) p-p,Uni (Vref)/(PGA Gain)
Adc Architecture
Sigma-Delta
Pkg Type
DIP,SOIC,SOP
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AD7715-3
Table 19 shows the AD7715-3 output rms noise for the selecta-
ble notch and −3 dB frequencies for the part, as selected by FS1
and FS0 of the setup register. The numbers given are for the
bipolar input ranges with a V
typical and are generated at an analog input voltage of 0 V with
the part used in unbuffered mode (BUF bit of the setup register
= 0). Table 20 meanwhile shows the output peak-to-peak noise
for the selectable notch and −3 dB frequencies for the part. It is
important to note that these numbers represent the resolution
Table 19. Output RMS Noise vs. Gain and Output Update Rate for AD7715-3 (Unbuffered Mode)
Filter First Notch and Output Data Rate
MCLK IN =
2.4576 MHz
50 Hz
60 Hz
250 Hz
500 Hz
Table 20. Peak-to-Peak Resolution vs. Gain and Output Update Rate for AD7715-3 (Unbuffered Mode)
Filter First Notch and Output Data Rate
MCLK IN =
2.4576 MHz
50 Hz
60 Hz
250 Hz
500 Hz
Table 21. Output RMS Noise vs. Gain and Output Update Rate for AD7715-3 (Buffered Mode)
Filter First Notch and Output Data Rate
MCLK IN =
2.4576 MHz
50 Hz
60 Hz
250 Hz
500 Hz
Table 22. Peak-to-Peak Resolution vs. Gain and Output Update Rate for AD7715-3 (Buffered Mode)
Filter First Notch and Output Data Rate
MCLK IN =
2.4576 MHz
50 Hz
60 Hz
250 Hz
500 Hz
MCLK IN =
1 MHz
20 Hz
25 Hz
100 Hz
200 Hz
MCLK IN =
1 MHz
20 Hz
25 Hz
100 Hz
200 Hz
MCLK IN =
1 MHz
20 Hz
25 Hz
100 Hz
200 Hz
MCLK IN =
1 MHz
20 Hz
25 Hz
100 Hz
200 Hz
REF
of 1.25 V. These numbers are
−3 dB Frequency
MCLK IN =
2.4576 MHz
13.1 Hz
15.72 Hz
65.5 Hz
131 Hz
−3 dB Frequency
MCLK IN =
2.4576 MHz
13.1 Hz
15.72 Hz
65.5 Hz
131 Hz
−3 dB Frequency
MCLK IN =
2.4576 MHz
13.1 Hz
15.72 Hz
65.5 Hz
131 Hz
−3 dB Frequency
MCLK IN =
2.4576 MHz
13.1 Hz
15.72 Hz
65.5 Hz
131 Hz
Rev. D | Page 17 of 40
MCLK IN =
1 MHz
5.24 Hz
6.55 Hz
26.2 Hz
52.4 Hz
MCLK IN =
1 MHz
5.24 Hz
6.55 Hz
26.2 Hz
52.4 Hz
MCLK IN =
1 MHz
5.24 Hz
6.55 Hz
26.2 Hz
52.4 Hz
MCLK IN =
1 MHz
5.24 Hz
6.55 Hz
26.2 Hz
52.4 Hz
for which there is no code flicker. They are not calculated based
on rms noise but on peak-to-peak noise. The numbers given are
for the bipolar input ranges with a V
BUF bit of the setup register = 0. These numbers are typical,
are generated at an analog input voltage of 0 V and are rounded
to the nearest LSB.
Meanwhile, Table 21 and Table 22 show rms noise and peak-
to-peak resolution respectively with the AD7715-3 operating
under the same conditions as above except that now the part is
operating in buffered mode (BUF bit of the setup register = 1).
270
Typical Output RMS Noise (μV)
Gain = 1
3.0
3.4
45
Typical Peak-to-Peak Resolution in Bits
Gain = 1
16
16
13
11
Typical Peak-to-Peak Resolution in Bits
Gain = 1
16
16
13
10
Gain = 1
4.5
5.1
50
270
Typical Output RMS Noise (μV)
Gain = 2
1.7
2.1
20
135
Gain = 2
16
16
13
11
Gain = 2
16
16
13
11
Gain = 2
2.4
2.9
25
135
Gain = 32
0.7
0.7
2.2
9.7
Gain = 32
14
14
13
10
Gain = 32
14
14
12
10
Gain = 32
2.6
9.7
0.9
0.9
REF
of 1.25 V and for the
Gain = 128
3.3
Gain = 128
Gain = 128
0.65
0.7
1.6
12
12
11
10
12
12
11
10
Gain = 128
0.9
1.0
2
3.3
AD7715