AD9626 Analog Devices, AD9626 Datasheet - Page 26

• Manufacturer Part Number: AD9626
• Description: 12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter
• Manufacturer: Analog Devices

Specifications of AD9626

• Resolution (bits): 12bit
• # Chan: 1
• Sample Rate: 250MSPS
• Interface: Par
• Analog Input Type: Diff-Uni
• Ain Range: 1 V p-p,1.25 V p-p,1.5 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

AD9626
Addr
(Hex)
09
OD
OF
14
16
17
18
Parameter Name
clock
test_io
ain_config
output_mode
output_phase
flex_output_delay
flex_vref
Bit 7
(MSB)
0
0
0
Output
clock
polarity
1 =
inverted
0 =
normal
(default)
Output
delay
enable:
0 =
enable
1 =
disable
0
0
Bit 6
0
0
Bit 5
0
Reset
PN23 gen:
1 = on
0 = off
(default)
0
Interleave
output
mode:
1 =
enabled
0 =
disabled
(default)
0
0
Reset
PN9 gen:
1 = on
0 = off
(default)
0
Output
enable:
0 =
enable
(default)
1 =
disable
0
Bit 4
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Bit 3
0
0
0
Input voltage range setting:
(Format determined by output_mode)
Output clock delay:
0100 = checker board output
0111 = one/zero word toggle
10000 = 0.98 V
10010 = 1.02 V
11111 = 1.23 V
00000 = 1.25 V
00001 = 1.27 V
01110 = 1.48 V
01111 = 1.50 V
00000 = 0.1 ns
00001 = 0.2 ns
00010 = 0.3 ns
11101 = 3.0 ns
11110 = 3.1 ns
11111 = 3.2 ns
10001 =1.00 V
10011 =1.04 V
Bit 2
0
Analog
input
disable:
1 = on
0 = off
(default)
Output
invert:
1 = on
0 = off
(default)
0101 = PN 23 sequence
0001 = midscale short
0000 = off (default)
Output test mode:
0010 = +FS short
0011 = −FS short
1010 = unused
1100 = unused
1000 = unused
1001 = unused
1011 = unused
…
…
…
0110 = PN 9
Bit 1
0
CML
enable:
1 = on
0 = off
(default)
Data format select:
00 = offset binary
10 = Gray code
complement
01 = twos
(default)
Bit 0
(LSB)
Duty
cycle
stabilizer:
0 =
disabled
1 =
enabled
(default)
0
Default
Value
(Hex)
0x01
0x00
0x00
0x00
0x03
0x00
0x00
Default Notes/
Comments
When set, the test
data is placed on
the output pins in
place of normal
data.