AD7191 Analog Devices, AD7191 Datasheet
AD7191
Specifications of AD7191
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AD7191 Summary of contents
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... Hz only rejection is obtained when the output data rate is set to 60 Hz. The AD7191 can be operated with the internal clock external clock can be used. The part operates with a power supply 5. consumes a current of 4 ...
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... AD7191 TABLE OF CONTENTS Features .............................................................................................. 1 Interface ............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Timing Characteristics ................................................................ 6 Timing Diagram ........................................................................... 6 Absolute Maximum Ratings ............................................................ 7 ESD Caution .................................................................................. 7 Pin Configuration and Function Descriptions ............................. 8 Typical Performance Characteristics ........................................... 10 RMS Noise and Resolution Specifications .................................. 13 ADC Circuit Information .............................................................. 14 Overview ...................................................................................... 14 Filter, Data Rate, and Settling Time ......................................... 14 REVISION HISTORY 5/09— ...
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... V min/V max DD AGND + 250 mV V min V max AV − 250 mV DD Rev Page AD7191 ; REFIN(−) = AGND; MCLK = 4.92 MHz; all DD Test Conditions/Comments See the RMS Noise and Resolution Specifications section See the RMS Noise and Resolution Specifications section ±2 ppm typical, AV ...
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... Hysteresis Input Currents LOGIC OUTPUT (DOUT/RDY) 2 Output High Voltage Output Low Voltage Output High Voltage Output Low Voltage AD7191B Unit ±2 nA max ±3 nA max ±5 pA/°C typ AV V nom min AV V max DD AGND – ...
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... Offset binary 3/5.25 V min/V max 2.7/5.25 V min/V max 0.85 mA max 3.6 mA max 5 mA max 0.4 mA max 0.6 mA max 1.5 mA typ 3 μA max Rev Page AD7191 Test Conditions/Comments 0.75 mA typical, gain = typical, gain = typical, gain = 64 or 128. 0.35 mA typical 0.5 mA typical External crystal used. ...
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... AD7191 TIMING CHARACTERISTICS 5. 2 5.25 V; AGND = DGND = 0 V, Input Logic Input Logic Table Parameter Limit MIN MAX t 100 3 t 100 4 Read Operation Sample tested during initial release to ensure compliance. All input signals are specified with t 2 See Figure 3 ...
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... 0 device reliability. −0 0 ESD CAUTION −0 0 −0 0 −40°C to +105°C −65°C to +150°C 150°C 128°C/W 42°C/W 260°C Rev Page AD7191 ...
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... CLKSEL Clock Select, Digital Input Pin. This pin selects the clock source to be used by the AD7191. When CLKSEL is tied low, the external clock/crystal is used as the clock source. When CLKSEL is tied high, the internal 4.92 MHz clock is used as the clock source to the AD7191. ...
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... Output Data Rate, Digital Input Pin. This pin is used with ODR1 to select the output data rate. See Table 5. is independent vice versa independent vice versa. DD Rev Page AD7191 . Therefore, DV can be operated Therefore, AV can be operated ...
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... AD7191 TYPICAL PERFORMANCE CHARACTERISTICS 8,388,295 8,388,290 8,388,285 8,388,280 8,388,275 8,388,270 0 200 400 600 SAMPLE Figure 5. Noise ( Output Data Rate = 10 Hz, REF DD Gain = 128) 150 100 50 0 CODE Figure 6. Noise Distribution Histogram ( Output Data Rate = 10 Hz, Gain = 128) REF DD 8,388,330 ...
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... Output Data Rate = 120 Hz, Gain = 1) REF –1 –2 800 1000 – –5 –10 –15 –20 –0.03 Rev Page AD7191 –3 –2 – (V) IN Figure 11. INL (Gain = 1) –0.02 –0.01 0 0.01 0.02 V (V) IN Figure 12. INL (Gain = 128) 4 0.03 ...
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... AD7191 170 168 166 164 162 160 158 156 154 –60 –40 – TEMPERATURE (°C) Figure 13. Offset Error (Gain = 1) 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 –1.2 –1.4 –60 –40 – TEMPERATURE (°C) Figure 14. Offset Error (Gain = 128) 1.000008 1.000006 1 ...
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... RMS NOISE AND RESOLUTION SPECIFICATIONS Table 5 shows the rms noise of the AD7191 for the four output data rates and four gains. The numbers given are for an external 5 V reference. These numbers are typical and are generated with a differential input voltage Table 6 shows the effective resolution ...
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... If the step change occurs synchronous to the conversion period (see Figure 17), then to generate a valid conversion, the settling time of the AD7191 must be allowed. If the step change occurs asynchronous to the end of a conversion (see Figure 18), then to generate a valid conversion, an extra conversion period must be allowed. The diagrams show the case for an output data rate ...
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... FREQUENCY (Hz) Figure 22. Filter Profile for the 120 Hz Output Data Rate GAIN The AD7191 has four gain options: gain = 1, gain = 8, gain = 64, and gain = 128. The PGA2 and PGA1 pins are used to set the gain. The analog input range is +V /gain. Table 7 shows the REF gains and the corresponding analog input ranges ...
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... Code = 2 × [(AIN × Gain/V where AIN is the analog input voltage (AIN1 – AIN2 or AIN3 – AIN4), Gain 64, or 128, and for the AD7191. BRIDGE POWER-DOWN SWITCH The bridge power-down switch (BPDSW) is useful in battery- powered applications where it is essential that the power consumption of the system be optimized. A 350 Ω ...
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... However, because the resolution of the AD7191 is so high, and the noise levels from the AD7191 are so low, care must be taken with regard to grounding and layout. The printed circuit board should be designed such that the analog and digital sections are separated and confined to certain areas of the board ...
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... The analog ground plane should be allowed to run under the AD7191 to prevent noise coupling. The power supply lines to the AD7191 should use as wide a trace as possible to provide low impedance paths and reduce the effects of glitches on the power supply line. Fast switching ...
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... WEIGH SCALES Figure 24 shows the AD7191 being used in a weigh scale application. The load cell is arranged in a bridge network and gives a differential output voltage between its OUT+ and OUT– ...
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... AD7191 OUTLINE DIMENSIONS 0.15 0.05 ORDERING GUIDE Models Temperature Range 1 AD7191BRUZ –40°C to +105°C 1 AD7191BRUZ-REEL –40°C to +105° RoHS Compliant Part. ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 7.90 7.80 7. 4.50 4.40 4.30 6.40 BSC ...