AD9634 Analog Devices, AD9634 Datasheet - Page 7

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AD9634

Manufacturer Part Number
AD9634
Description
12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD9634

Resolution (bits)
12bit
# Chan
1
Sample Rate
250MSPS
Interface
LVDS
Analog Input Type
Diff-Uni
Ain Range
1.75 V p-p
Adc Architecture
Pipelined
Pkg Type
CSP
SWITCHING SPECIFICATIONS
Table 4.
Parameter
CLOCK INPUT PARAMETERS
DATA OUTPUT PARAMETERS
1
2
Timing Diagram
See
Conversion rate is the clock rate after the divider.
Input Clock Rate
Conversion Rate
CLK Period, Divide-by-1 Mode (t
CLK Pulse Width High (t
Aperture Delay (t
Aperture Uncertainty (Jitter, t
Data Propagation Delay (t
DCO Propagation Delay (t
DCO to Data Skew (t
Pipeline Delay (Latency)
Wake-Up Time (from Standby)
Wake-Up Time (from Power-Down)
Out-of-Range Recovery Time
Figure 2
DCS Enabled
DCS Disabled
Divide-by-1 Mode, DCS Enabled
Divide-by-1 Mode, DCS Disabled
Divide-by-2 Mode Through
EVEN/ODD
Divide-by-8 Mode
.
D10±/D11±
D0±/D1±
(MSB)
VIN
DCO–
DCO+
CLK+
(LSB)
CLK–
2
A
)
SKEW
CH
)
1
)
1
PD
DCO
)
)
J
)
CLK
N – 1
)
t
CH
Temperature
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Figure 2. Even/Odd LVDS Mode Data Output Timing
t
t
PD
N
DCO
t
A
N – 10
N – 10
t
D10
CLK
D0
t
Rev. 0 | Page 7 of 32
SKEW
Min
40
10
5.8
2.61
2.76
0.8
4.1
4.7
0.3
N – 10
N – 10
AD9634-170
D11
N + 1
D1
Typ
2.9
2.9
1.0
0.1
4.7
5.3
0.5
10
10
100
3
N – 9
N – 9
D10
D0
Max
625
170
170
3.19
3.05
5.2
5.8
0.7
N – 9
N – 9
N + 2
D11
D1
Min
40
10
4.8
2.16
2.28
0.8
4.1
4.7
0.3
AD9634-210
N – 8
N – 8
D10
D0
Typ
2.4
2.4
1.0
0.1
4.7
5.3
0.5
10
10
100
3
N + 3
N – 8
N – 8
D11
D1
Max
625
210
210
2.64
2.52
5.2
5.8
0.7
N – 7
N – 7
D10
D0
Min
40
10
4
1.8
1.9
0.8
4.1
4.7
0.3
AD9634-250
N + 4
N – 7
N – 7
D11
D1
Typ
2.0
2.0
1.0
0.1
4.7
5.3
0.5
10
10
100
3
N – 6
N – 6
D10
D0
Max
625
250
250
2.2
2.1
5.2
5.8
0.7
AD9634
N + 5
Unit
MHz
MSPS
MSPS
ns
ns
ns
ns
ns
ps rms
ns
ns
ns
Cycles
μs
μs
Cycles

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