AT90PWM1 Atmel Corporation, AT90PWM1 Datasheet
AT90PWM1
Specifications of AT90PWM1
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AT90PWM1 Summary of contents
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... Power On Reset and Programmable Brown Out Detection – Flag Array in Bit-programmable I/O Space (4 bytes) – In-System Programmable via SPI Port – Internal Calibrated RC Oscillator ( 8 MHz) – On-chip PLL for fast PWM ( 32 MHz, 64 MHz) and CPU (16 MHz) 8-bit Microcontroller with 8K Bytes In-System Programmable Flash AT90PWM1 Summary 4378CS–AVR–09/08 ...
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... Typical values contained in this datasheet are based on simulations and characterization of other AVR microcontrollers manufactured on the same process technology. Min and Max val- ues will be available after the device is characterized. 3. Pin Configurations Figure 3-1. AT90PWM1 2 Revision First revision of parts SOIC 24-pin Package 4378CS–AVR–09/08 ...
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... Figure 3-2. (PSCIN2/OC1A/MISO_A) PD2 4378CS–AVR–09/08 QFN 32 -pin Package AT90PWM1 QFN 32 1 (OC0A/SS/MOSI_A) PD3 VCC 4 GND (MISO/PSCOUT20) PB0 8 AT90PWM1 24 PB4 (AMP0+) 23 PB3 (AMP0 AREF AGND 20 AVCC ...
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... AT90PWM1 4 Mnemonic Type GND Power Ground: 0V reference AGND Power Analog Ground: 0V reference for analog part VCC power Power Supply: Analog Power Supply: This is the power supply voltage for analog part AVCC Power For a normal use this pin must be connected. ...
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... Overview The AT90PWM1 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the AT90PWM1 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power con- sumption versus processing speed. ...
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... CISC microcontrollers. The AT90PWM1 provides the following features: 8K bytes of In-System Programmable Flash with Read-While-Write capabilities, 512 bytes EEPROM, 512 bytes SRAM, 53 general purpose I/O lines, 32 general purpose working registers, 2 Power Stage Controllers, two flexible ...
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... As inputs, Port D pins that are externally pulled low will source current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port D also serves the functions of various special features of the AT90PWM1 as listed on 68. 4378CS–AVR–09/08 ...
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... Be aware that not all C compiler vendors include bit definitions in the header files and interrupt handling compiler dependent. Please confirm with the C compiler documen- tation for more details. AT90PWM1 8 Table 9-1 on page , even if the ADC is not used. If the ADC is used, it should be connected ...
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... AT90PWM1 Bit 2 Bit 1 Bit 0 PRFM2B2 PRFM2B1 PRFM2B0 PRFM2A2 PRFM2A1 PRFM2A0 PARUN2 PCCYC2 PRUN2 POP2 PCLKSEL2 POME2 POMV2A2 POMV2A1 POMV2A0 POEN2C POEN2B ...
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... Reserved – (0x82) TCCR1C FOC1A (0x81) TCCR1B ICNC1 (0x80) TCCR1A COM1A1 (0x7F) DIDR1 – (0x7E) DIDR0 ADC7D (0x7D) Reserved – AT90PWM1 10 Bit 6 Bit 5 Bit 4 Bit 3 – – – – – – – – – – – – – – – ...
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... EERIE GPIOR06 GPIOR05 GPIOR04 GPIOR03 – – – – – – INTF3 GPIOR36 GPIOR35 GPIOR34 GPIOR33 AT90PWM1 Bit 3 Bit 2 Bit 1 Bit 0 MUX2 MUX1 MUX0 ADTS2 ADTS1 ADTS0 ADIE ADPS2 ADPS1 ADPS0 - / ADC4 ADC9 / ADC3 ADC8 / ADC2 ADC2 / - ADC1 / - ...
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... When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The AT90PWM1 is a com- plex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN and OUT instructions ...
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... Branch if Half Carry Flag Set Branch if Half Carry Flag Cleared Branch if T Flag Set Branch if T Flag Cleared Branch if Overflow Flag is Set Branch if Overflow Flag is Cleared Branch if Interrupt Enabled Branch if Interrupt Disabled AT90PWM1 Operation Flags Rd ← Z,C,N,V,H Rd ← Z,C,N,V,H Rdh:Rdl ← Rdh:Rdl + K Z,C,N,V,S Rd ← ...
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... LPM Rd, Z+ SPM IN Rd, P OUT P, Rr PUSH Rr POP Rd MCU CONTROL INSTRUCTIONS AT90PWM1 14 Description Set Bit in I/O Register Clear Bit in I/O Register Logical Shift Left Logical Shift Right Rotate Left Through Carry Rotate Right Through Carry Arithmetic Shift Right Swap Nibbles Flag Set Flag Clear ...
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... Mnemonics Operands NOP SLEEP WDR BREAK 4378CS–AVR–09/08 Description No Operation Sleep (see specific descr. for Sleep function) Watchdog Reset (see specific descr. for WDR/timer) Break AT90PWM1 Operation Flags None None None For On-chip Debug Only None #Clocks N/A 15 ...
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... Note: This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. AT90PWM1 16 Ordering Code Package AT90PWM1-16SU SO24 AT90PWM1-16MU QFN32 Operation Range 0°C to Extended (-4 105°C) 0°C to Extended (-4 105°C) 4378CS–AVR–09/08 ...
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... Package Information 24-Lead, 0.300” Body width, SO24 Plastic GullWing Small Outline Package (SOIC) QFN32 32-Lead, Quad Flat No lead 4378CS–AVR–09/08 Package Type AT90PWM1 17 ...
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... SO24 AT90PWM1 18 4378CS–AVR–09/08 ...
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... QFN32 4378CS–AVR–09/08 AT90PWM1 19 ...
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... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2008 Atmel Corporation. All rights reserved. Atmel Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. International Atmel Asia ...