AT32UC3C0256C Atmel Corporation, AT32UC3C0256C Datasheet - Page 969

• Manufacturer Part Number: AT32UC3C0256C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C0256C

• Flash (kbytes): 256 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 123
• Ext Interrupts: 144
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 7
• Twi (i2c): 3
• Uart: 5
• Can: 2
• Lin: 5
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 22
• Input Capture Channels: 12
• Pwm Channels: 20
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

33.6.2
33.6.2.1
Figure 33-3. Functional View of the Channel Block Diagram
32117C–AVR-08/11
channel x
selector
counter
clock
PWM Channel
update
period
duty-
cycle
Block Diagram
channel 0
counter
MUX
Each of the 4 channels is composed of six blocks:
• A clock selector which selects one of the clocks provided by the clock generator (described in
• A counter clocked by the output of the clock selector. This counter is incremented or
• A comparator used to compute the OCx output waveform according to the counter value and
• A 2-bit configurable gray counter enables the stepper motor driver. One gray counter drives 2
• A dead-time generator providing two complementary outputs (DTOHx/DTOLx) which allows
• An output override block that can force the two complementary outputs to a programmed
• An asynchronous fault protection mechanism that has the highest priority to override the two
arator
comp
Section 33.6.1 on page
decremented according to the channel configuration and comparators matches. The size of
the counter is 20 bits.
the configuration. The counter value can be the one of the channel counter or the one of the
channel 0 counter according to SYNCx bit in the
1005
channels.
to drive external power control switches safely.
value (OOOHx/OOOLx).
complementary outputs in case of fault detection (PWMHx/PWMLx).
SYNCx
(SCM).
2-bit gray
counter z
OCx
Channel x
dead-time
generator
967).
z=0 (x=0, y=1)
z=1 (x=2, y=3)
z=2 (x=4, y=5)
DTOHx
DTOLx
override
output
”Sync Channels Mode Register” on page
OOOHx
OOOLx
protection
fault
AT32UC3C
PWMHx
PWMLx
969