AT32UC3B1512 Atmel Corporation, AT32UC3B1512 Datasheet - Page 348

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AT32UC3B1512

Manufacturer Part Number
AT32UC3B1512
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3B1512

Flash (kbytes)
512 Kbytes
Pin Count
48
Max. Operating Frequency
60 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
28
Ext Interrupts
28
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
96
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT32UC3B1512-Z1UT
Manufacturer:
ROHM
Quantity:
20 000
21.7.15
Name:
Access Type:
Offset:
Reset Value:
• DRIFT: Drift compensation
• RX_MPOL: Receiver Manchester Polarity
• RX_PP: Receiver Preamble Pattern detected
Table 21-24.
• RX_PL: Receiver Preamble Length
• TX_MPOL: Transmitter Manchester Polarity
32059L–AVR32–01/2012
31
23
15
7
0
0
1
1
0: The USART can not recover from a clock drift.
1: The USART can recover from clock drift (only available in 16x oversampling mode).
0: Zeroes are encoded as zero-to-one transitions, and ones are encoded as a one-to-zero transitions.
1: Zeroes are encoded as one-to-zero transitions, and ones are encoded as a zero-to-one transitions.
0: The receiver preamble pattern detection is disabled.
1 - 15: The detected preamble length is RX_PL x bit period
0: Zeroes are encoded as zero-to-one transitions, and ones are encoded as a one-to-zero transitions.
1: Zeroes are encoded as one-to-zero transitions, and ones are encoded as a zero-to-one transitions.
Manchester Configuration Register
RX_PP
DRIFT
30
22
14
MAN
Read-write
0x50
0x30011004
6
0
1
0
1
Preamble Pattern default polarity assumed (RX_MPOL field not set)
ALL_ONE
ALL_ZERO
ZERO_ONE
ONE_ZERO
29
21
13
1
5
RX_MPOL
TX_MPOL
28
20
12
4
27
19
11
3
26
18
10
2
RX_PL
TX_PL
25
17
9
1
RX_PP
TX_PP
24
16
8
0
348

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