QL3012 QuickLogic Corp, QL3012 Datasheet
QL3012
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QL3012 Summary of contents
Page 1
... PCI- compliant for 5.0 volt and 3.3 volt buses for -1/-2 speed grades • 8 high-drive input/distributed network pins © 2005 QuickLogic Corporation Eight Low-Skew Distributed Networks • Two array clock/control networks are available to the logic cell flip-flop; clock, set, and reset inputs — ...
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... QL3040 24,000 QL3060 36,000 Military Temperature (-55°C to +125°C) • • 2 www.quicklogic.com • • • • Table 1: Military pASIC 3 Product Family Members QL3012 Max Gates 15,740 Logic Array 20x16 Logic Cells 320 388 Max I/O 68 PLCC 84 PQFP - Table 2: Selector Table ...
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... FPGA software solution from design entry to logic synthesis, to place and route, to simulation. The QuickTools for designers who use Cadence other third-party tools for design entry, synthesis, or simulation. © 2005 QuickLogic Corporation Military Plastic pASIC 3 Family Data Sheet Rev for Workstations package provides a solution ...
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... Parameter High Drive Input Delay by the numbers provided in Table 12 Propagation Delays (ns) Fanout 1.4 1.7 1.9 1.7 1.7 1.7 0.0 0.0 0.0 0.7 1.0 1.2 1.2 1.2 1.2 1.2 1.2 1.2 1.0 1.3 1.5 0.8 1.1 1.3 1.9 1.9 1.9 1.8 1.8 1.8 ° = 3.3 V and Multiply by the appropriate CC Table 12 . Propagation Delays (ns) Fanout 1.5 1.6 1.8 1.9 2.4 1.6 1.7 1.9 2.0 2.5 3.1 3.1 3.1 3.1 3.1 0.0 0.0 0.0 0.0 0.0 0.7 0.8 1.0 1.1 1.6 0.6 0.7 0.9 1.0 1.5 2.3 2.3 2.3 2.3 2.3 0.0 0.0 0.0 0.0 0.0 ° = 3.3 V and Multiply by the appropriate CC Table 12 . © 2005 QuickLogic Corporation Table 2.2 3.2 1.7 1.7 0.0 0.0 1.5 2.5 1.2 1.2 1.2 1.2 1.8 2.8 1.6 2.6 1.9 1.9 1.8 1 2.9 4.4 3.0 4.5 3.1 3.1 0.0 0.0 2.1 3.6 2.0 3.5 2.3 2.3 0.0 0.0 ...
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... The number of half columns used does not affect clock buffer delay. The array clock has loads per half column. The global clock has loads per half column. © 2005 QuickLogic Corporation Military Plastic pASIC 3 Family Data Sheet Rev. C Table 5: Military QL3012 Clock Cells Propagation Delays (ns) Loads per Half Column ...
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... Propagation Delays (ns) Output Load Capacitance (pF) Parameter 30 2.1 2.2 1.2 1.6 a 2.0 a 1.2 are used for t : PXZ Figure 2: Loads used for t t PHZ 5 pF Propagation Delays (ns) Fanout 1.3 1.6 1.8 2.1 3.1 3.1 3.1 3.1 0.0 0.0 0.0 0.0 0.7 1.0 1.2 1.5 0.6 0.9 1.1 1.4 2.3 2.3 2.3 2.3 0.0 0.0 0.0 0.0 ° = 3.3 V and Multiply by the appropriate CC Table 100 2.5 3.1 3.6 2.6 3.2 3.7 1.7 2.2 2.8 2.0 2.6 3 PXZ t PLZ 5 pF © 2005 QuickLogic Corporation 3.1 3.6 3.1 3.1 0.0 0.0 2.5 3.0 2.4 2.9 2.3 2.3 0.0 0.0 150 4.7 4.8 3.9 4 ...
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... Only one output at a time. Duration should not exceed 30 seconds. d. Maximum for all military grade devices. For AC conditions, contact QuickLogic customer applications group (see CC “Contact Information” on page 21 © 2005 QuickLogic Corporation Military Plastic pASIC 3 Family Data Sheet Rev. C through Table 11 Table 13 ...
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... Figure 3: Voltage Factor vs. Supply Voltage Voltage Factor vs. Supply Voltage 1.1000 1.0800 1.0600 1.0400 1.0200 1.0000 0.9800 0.9600 0.9400 0.9200 3 3.1 3.2 Supply Voltage (V) Figure 4: Temperature Factor vs. Operating Temperature Temperature Factor vs. Operating Temperature 1.15 1.10 1.05 1.00 0.95 0.90 0.85 -60 -40 -20 0 Junction Temperature C 3.3 3.4 3.5 3 © 2005 QuickLogic Corporation ...
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... NOTE: Ramping the maximum voltage faster than 400 µs can cause the device to behave CC CCIO improperly. For users with a limited power budget, keep (V © 2005 QuickLogic Corporation Military Plastic pASIC 3 Family Data Sheet Rev. C Figure 5: Power-Up Requirements ( CCIO CC MAX ...
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... Figure 6: JTAG Block Diagram TAp Controller Instruction Decode State Machine & (16 States) Control Logic Instruction Register Mux Boundary-Scan Register (Data Register) Internal Register User Defined Data Register The Sample/Preload Instruction allows a device to remain in its functional TDO Mux Bypass Register I/O Registers © 2005 QuickLogic Corporation ...
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... CC V Input voltage tolerance pin CCIO GND Ground pin © 2005 QuickLogic Corporation Military Plastic pASIC 3 Family Data Sheet Rev. C Table 14: Pin Descriptions Hold HIGH during normal operation. Connect to V used for JTAG. Hold LOW during normal operation. Connect to ground if not used for JTAG ...
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... I/O 14 I/O 15 I/O 16 I/O 17 I/O 18 I/O 19 GND 20 I • • 12 www.quicklogic.com • • • • Figure 7: QL3012 – 84 Pin PLCC (Top View GND IO I ACLK/I I pASIC 3 GCLK/I VCC IO QL3012-1PL84C IO IO ...
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... QL3025 – 208 PQFP Pinout Diagram Pin 1 Pin 53 © 2005 QuickLogic Corporation Military Plastic pASIC 3 Family Data Sheet Rev. C Figure 8: QL3025 – 208 Pin PQFP (Top View) pASIC 3 QL3025-1PQ208C Pin 157 Pin 105 • • www.quicklogic.com • • • • 13 ...
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... I/O 195 154 I/O 196 155 I/O 197 156 I/O 198 157 TCK 199 GND 158 STM 200 159 I/O 201 160 I/O 202 161 I/O 203 162 I/O 204 163 GND 205 164 I/O 206 165 VCC 207 166 I/O 208 167 I/O 168 I/O © 2005 QuickLogic Corporation I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O VCC I/O I/O I/O I/O I/O TDO I/O ...
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... QL3040 – 208 PQFP Pinout Diagram Pin 1 Pin 53 © 2005 QuickLogic Corporation Military Plastic pASIC 3 Family Data Sheet Rev. C Figure 9: QL3040 – 208 Pin PQFP (Top View) pASIC 3 QL3040-1PQ208C Pin 157 Pin 105 • • www.quicklogic.com • • • • 15 ...
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... I/O I/O 157 TCK 158 STM I/O 159 I/O I/O 160 I/O I/O 161 I/O I/O 162 I/O I/O 163 GND I/O 164 I/O I/O 165 VCC I/O 166 I/O I/O 167 I/O I/O 168 I/O © 2005 QuickLogic Corporation Function 169 I/O 170 I/O 171 I/O 172 I/O 173 I/O 174 I/O 175 I/O 176 I/O 177 GND 178 I/O 179 I/O 180 I/O 181 I/O 182 GND 183 I/O 184 I/O 185 I/O 186 ...
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... QL3060 – 208 PQFP Pinout Diagram Pin 1 Pin 53 © 2005 QuickLogic Corporation Military Plastic pASIC 3 Family Data Sheet Rev. C Figure 10: QL3060 – 208 Pin PQFP (Top View) pASIC 3 QL3060-1PQ208C Pin 157 Pin 105 • • www.quicklogic.com • • • • 17 ...
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... I/O I/O 157 TCK 158 STM I/O 159 I/O I/O 160 I/O I/O 161 I/O I/O 162 I/O I/O 163 GND I/O 164 I/O I/O 165 VCC I/O 166 I/O I/O 167 I/O I/O 168 I/O © 2005 QuickLogic Corporation Function 169 I/O 170 I/O 171 I/O 172 I/O 173 I/O 174 I/O 175 I/O 176 I/O 177 GND 178 I/O 179 I/O 180 I/O 181 I/O 182 GND 183 I/O 184 I/O 185 I/O 186 ...
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... Package Mechanical Drawings 84 PLCC Packaging Drawing © 2005 QuickLogic Corporation Military Plastic pASIC 3 Family Data Sheet Rev. C www.quicklogic.com • • 19 • • • • ...
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... Military Plastic pASIC 3 Family Data Sheet Rev. C 208 PQFP Packaging Drawing • • 20 www.quicklogic.com • • • • © 2005 QuickLogic Corporation ...
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... Packaging Information The Military pASIC 3 product family packaging information is presented in NOTE: Military temperature range plastic packages will be added as follows on products to the commercial and industrial products. Device QL3012 Information Pin Package 84 PLCC a Definitions a. PLCC = Plastic Leaded Chip Carrier PQFP = Plastic Quad Flat Pack ...
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... Copyright and Trademark Information Copyright © 2005 QuickLogic Corporation. All Rights Reserved. The information contained in this document is protected by copyright. All rights are reserved by QuickLogic Corporation. QuickLogic Corporation reserves the right to modify this document without any obligation to notify any person or entity of such revision. Copying, duplicating, selling, or otherwise distributing any part of this product without the prior written consent of an authorized representative of QuickLogic is prohibited ...