MBM29F200BA-70PFTN Fujitsu, MBM29F200BA-70PFTN Datasheet
MBM29F200BA-70PFTN
Related parts for MBM29F200BA-70PFTN
MBM29F200BA-70PFTN Summary of contents
Page 1
... FUJITSU SEMICONDUCTOR DATA SHEET FLASH MEMORY CMOS 2M ( 256K 8/128K 16 ) MBM29F200TA/MBM29F200BA DISTINCTIVE CHARACTERISTICS • Single 5.0 V read, write, and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Uses same software commands as E • Compatible with JEDEC-standard word-wide pinouts 48-pin TSOP (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type) 44-pin SOP (Package suffix: PF) • ...
Page 2
MBM29F200TA/200BA PACKAGE Marking side (FPT-48P-M19) 48-pin TSOP 2 Marking side (FPT-48P-M20) Marking side (FPT-44P-M16) 44-pin SOP ...
Page 3
... RY/ BY pin. Once the end of a program or erase cycle has been completed, the 6 device internally resets to the read mode. Fujitsu's Flash technology combines years of EPROM and E quality, reliability and cost effectiveness. The MBM29F200TA/BA memory electrically erases the entire chip or all bits within a sector simultaneously via Fowler-Nordhiem tunneling. The bytes/words are programmed one byte/ word at a time using the EPROM programming mechanism of hot electron injection ...
Page 4
... MBM29F200TA Sector Architecture 4 3FFFFh 64K byte 3BFFFh 64K byte 39FFFh 64K byte 37FFFh 32K byte 2FFFFh 8K byte 1FFFFh 8K byte 0FFFFh 16K byte MBM29F200BA Sector Architecture 3FFFFh 2FFFFh 1FFFFh 0FFFFh 07FFFh 05FFFh 03FFFh ...
Page 5
PRODUCT SELECTOR GUIDE Family Part No Ordering Part 5 5.0 V 10% CC Max Access Time (ns) CE Access (ns) OE Access (ns) BLOCK DIAGRAM RY/BY Buffer ...
Page 6
... FPT-48P-M19 A 24 (Marking Side N.C. 17 N.C. 16 RY/BY 15 N.C. 14 MBM29F200TA/MBM29F200BA N.C. 13 Reverse Pinout RESET N. FPT-48P-M20 6 SOP (Top View) ...
Page 7
LOGIC SYMBOL A RESET RY/BY BYTE MBM29F200TA/200BA Table 1 MBM29F200TA/BA Pin Configuration Pin Function A- Address Inputs ...
Page 8
MBM29F200TA/200BA ORDERING INFORMATION Standard Products FJ standard products are available in several packages. The order number is formed by a combination of: MBM29F200 TA –70 PFTN DEVICE NUMBER/DESCRIPTION MBM29F200 2 Mega-bit (256K 5.0 V-only Read, Write, and Erase 8 PACKAGE ...
Page 9
Table 2 MBM29F200TA/BA User Bus Operations (BYTE = V Operation Auto-Select Manufacturer Code (1) Auto-Select Device Code (1) Read (3) Standby Output Disable Write Enable Sector Protection (2) Verify Sector Protection (2) Temporary Sector Unprotection Reset (Hardware)/Standby Table 3 MBM29F200TA/BA ...
Page 10
... 51H and MBM29F200BA = 57H for x8 mode; MBM29F200TA = 2251H and MBM29F200BA = 2257H for x16 mode). All identifires for manufacturer and device will exhibit odd parity with DQ to read the proper device codes when executing the autoselect output from the device is disabled ...
Page 11
... Type Code DQ Manufacturer's Code 04H MBM29F200TA (B) 51H (W) 2251H Device Code MBM29F200BA (B) 57H 2257H (W) Sector Protection 01H (B): Byte mode (W): Word mode Write Device erasure and programming are accomplished via the command register. The contents of the register serve as inputs to the internal state machine. The state machine outputs dictate the function of the device. ...
Page 12
MBM29F200TA/200BA To activate this mode, the programming equipment must force 11.5 V and The sector addresses ( protected. Tables 5 and 6 define ...
Page 13
... Table 5 Sector Address Tables (MBM29F200TA) Sector A16 A15 Address SA0 0 0 SA1 0 1 SA2 1 0 SA3 1 1 SA4 1 1 SA5 1 1 SA6 1 1 Table 6 Sector Address Tables (MBM29F200BA) Sector A16 A15 Address SA0 0 0 SA1 0 0 SA2 0 0 SA3 0 0 SA4 0 1 SA5 1 0 SA6 1 1 ...
Page 14
MBM29F200TA/200BA Table 7 MBM29F200TA/BA Command Definitions Bus First Bus Write Write Cycle Command Cycles Sequence Req'd Addr Word Read/Reset* 1 XXXH Byte Word 5555H Read/Reset* 3 Byte AAAAH Word 5555H Autoselect 3 Byte AAAAH Word 5555H Program 4 Byte AAAAH ...
Page 15
... XX00H retrieves the manufacture code of 04H. A read cycle from address XX01H for x16 (XX02H for x8)returns the device code (MBM29F200TA = 51H and MBM29F200BA = 57H for x8 mode; MBM29F200TA = 2251H and MBM29F200BA = 2257H for x16 mode). (See Tables 4.1 and 4.2.) All manufacturer and device codes will exhibit odd parity with DQ Sector state (protection or unprotection) will be informed by address XX02H for x16 (XX04H for x8) ...
Page 16
MBM29F200TA/200BA Chip Erase Chip erase is a six bus cycle operation. There are two “unlock” write cycles. These are followed by writing the “set- up” command. Two more “unlock” write cycles are then followed by the chip erase command. Chip ...
Page 17
... DQ = Don’t Care for 16 mode for Fujitsu internal use only Data Polling The MBM29F200TA/BA device features Data Polling as a method to indicate to the host that the Embedded Algorithms are in progress or completed. During the Embedded Program Algorithm an attempt to read the device ...
Page 18
MBM29F200TA/200BA For chip erase, the Data Polling is valid after the rising edge of the sixth WE pulse in the six write pulse sequence. For sector erase, the Data Polling is valid after the last rising edge of the sector ...
Page 19
DQ 3 Sector Erase Timer After the completion of the initial sector erase command sequence the sector erase time-out will begin. DQ remain low until the time-out is complete. Data Polling and Toggle Bit are valid after the initial sector ...
Page 20
MBM29F200TA/200BA operation and hence commands are written and 13 for the timing diagram. Data Protection The MBM29F200TA/BA is designed to offer protection against accidental erasure or programming caused by spurious system level signals that may exist during ...
Page 21
ABSOLUTE MAXIMUM RATINGS Storage Temperature ..........................................................................................– +125 C Ambient Temperature with Power Applied ..........................................................– +85 C Voltage with Respect to Ground All pins except A V (Note 1) ........................................................................................................–2 +7 ...
Page 22
MBM29F200TA/200BA MAXIMUM OVERSHOOT +0.8 V –0.5 V –2.0 V Figure 1 Maximum Negative Overshoot Waveform +2.0 V Figure 2 Maximum Positive Overshoot Waveform +13.5 V +13 +0 *:This ...
Page 23
DC CHARACTERISTICS • TTL/NMOS Compatible Parameter Parameter Description Symbol I LI Input Leakage Current I Output Leakage Current LO I LIT A , OE, RESET Inputs Leakage Current Active Current (Note 1) CC1 CC I CC2 V ...
Page 24
MBM29F200TA/200BA DC CHARACTERISTICS (continued) • CMOS Compatible Parameter Parameter Description Symbol I Input Leakage Current LI I Output Leakage Current OE, RESET Inputs Leakage 9 I LIT Current I V Active Current (Note 1) CC1 CC I ...
Page 25
AC CHARACTERISTICS • Read Only Operations Characteristics Parameter Symbols Description Stan- JEDEC dard t t Read Cycle Time AVAV RC t Address to Output Delay t AVQV ACC t Chip Enable to Output Delay t ELQV Output ...
Page 26
MBM29F200TA/200BA Device Under Test Note: For –70 including jig capacitance L For all others 100 pF including jig capacitance L • Write/Erase/Program Operations Alternate WE Controlled Writes Parameter Symbols JEDEC Standard t Write Cycle ...
Page 27
Parameter Symbols JEDEC Standard t t Read Recover Time Before Write GHWL GHWL Setup Time CS ELWL Hold Time CH WHEH t t Write Pulse Width WP WLWH t t Write Pulse Width ...
Page 28
MBM29F200TA/200BA • Write/Erase/Program Operations Alternate CE Controlled Writes Parameter Symbols JEDEC Standard t Write Cycle Time t AVAV Address Setup Time AVEL Address Hold Time ELAX AH t Data Setup Time t DVEH DS ...
Page 29
SWITCHING WAVEFORMS • Key to Switching Waveforms WAVEFORM Addresses OEH WE High-Z Outputs Figure 5 AC Waveforms for Read Operations MBM29F200TA/200BA INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Be Change Changing from H to ...
Page 30
MBM29F200TA/200BA 3rd Bus Cycle Addresses 5555H GHWL A0H Data t DS 5.0V Notes address of the memory location to be programmed data to be programmed at ...
Page 31
Addresses A0H Data t DS 5.0V Notes address of the memory location to be programmed data to be programmed at byte address. 3. ...
Page 32
MBM29F200TA/200BA Addresses 5555H CE t GHWL Data AAH VCS Notes the sector address for Sector Erase. Addresses = 5555H (Word), AAAAH (Byte) for Chip Erase. 2. These ...
Page 33
OEH Valid Data (The device has completed the Embedded operation). *DQ 7 Figure 9 AC Waveforms for Data Polling during Embedded Algorithm Operations CE t OEH ...
Page 34
MBM29F200TA/200BA CE WE RY/BY Figure 11 RY/BY Timing Diagram During Program/Erase Operations CE RY/BY RESET Figure 12 RESET/RY/BY Timing Diagram 34 The rising edge of the last WE signal Entire programming or erase operations t BUSY READY ...
Page 35
CE OE BYTE t ELFL t ELFH /A–1 15 Figure 13 BYTE Timing Diagram for Read Operations CE WE BYTE Figure 14 BYTE Timing Diagram for Write Operations MBM29F200TA/200BA Data Output Data Output (DQ ...
Page 36
MBM29F200TA/200BA SAX 12V VLHT 12V VLHT WE t OESP t CSP CE Data SAX = Sector Address for initial sector SAY = ...
Page 37
RESET VLHT RY/BY Figure 16 Temporary Sector Unprotection MBM29F200TA/200BA Program or Erase Command Sequence ...
Page 38
MBM29F200TA/200BA EMBEDDED ALGORITHMS Increment Address Program Command Sequence* (Address/Command The sequence is applied for x16 mode. The addresses differ from x8 mode. Figure 17 Embedded Programming Algorithm Table 9 Embedded Programming Algorithm Bus Operations Standby* Write Read Standby* ...
Page 39
EMBEDDED ALGORITHMS Chip Erase Command Sequence* (Address/Command): 5555H/AAH 2AAAH/55H 5555H/80H 5555H/AAH 2AAAH/55H 5555H/10H * : The sequence is applied for x16 mode. The addresses differ from x8 mode. Figure 18 Embedded Erase Algorithm Table 10 Embedded Erase Algorithm Bus Operations ...
Page 40
MBM29F200TA/200BA Note rechecked even Start VA = Address for programming Read Byte ( Addr = VA Yes DQ = Data Yes Read ...
Page 41
DQ No (DQ DQ Note rechecked even changing to “1” . Figure 20 Toggle Bit Algorithm MBM29F200TA/200BA Start Read Byte VA = Address for programming Any of ...
Page 42
MBM29F200TA/200BA Increment PLSCNT NO PLSCNT = 25? YES Remove V From Write Reset Command Device Failed Figure 21 Sector Protection Algorithm 42 Start Set Up Sector Addr ( ...
Page 43
Start RESET = V (Note 1) Perform Erase or Program Operations RESET = V Temporary Sector Group Unprotect Completed (Note 2) NOTES: 1. All protected sectors unprotected. 2. All previously protected sectors are protected once again. Figure 22 Temporary Sector ...
Page 44
MBM29F200TA/200BA ERASE AND PROGRAMMING PERFORMANCE Parameter Min. Sector Erase Time Byte Programming Time Chip Programming Time Erase/Program Cycle 100,000 TSOP PIN CAPACITANCE Parameter Parameter Description Symbol C Input Capacitance IN C Output Capacitance OUT C Control Pin Capacitance IN2 Note: ...
Page 45
... Standard Thin Small Outline Package (measured in inches) LEAD No. 1 INDEX 24 20.00±0.20 (.787±.008) * 18.40±0.20 (.724±.008) 0.10(.004) 19.00±0.20 (.748±.008) 1994 FUJITSU LIMITED F48029S-1C-1 C MBM29F200TA/200BA +.010 –.008 23 13.00±0.10 16.00±0.20 (.512±.004) (.630±.008) "A" 22 +0.10 0(0)MIN – ...
Page 46
... Reversed Thin Small Outline Package (measured in inches) LEAD No. 1 INDEX 24 19.00±0.20 (.748±.008) 0.10(.004) * 18.40±0.20 (.724±.008) 20.00±0.20 (.787±.008) 1994 FUJITSU LIMITED F48030S-1C Details of "A" part 0.15(.006) MAX 0.35(.014) "A" MAX 0.15(.006) 0.25(.010) 25 0.50± ...
Page 47
... Information sufficient for construction purposes is not nec- essarily given. The information contained in this document has been carefully checked and is believed to be reliable. However, Fujitsu as- sumes no responsibility for inaccuracies. The information contained in this document does not convey any license under the copyrights, patent rights or trademarks claimed and owned by Fujitsu ...