AM79C988BJC Advanced Micro Devices, AM79C988BJC Datasheet
AM79C988BJC
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AM79C988BJC Summary of contents
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... QuIET device provides automatic polarity detection and correction and can operate in either normal or full- duplex mode. This document contains information on a product under development at Advanced Micro Devices. The information is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed product without notice. ...
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BLOCK DIAGRAM PDO[0] PAUI Port PDI[0] Line Drivers and Receivers PCI[0] PDO[1] PAUI Port PDI[1] Line Drivers and Receivers PCI[1] PDO[2] PAUI Port PDI[2] Line Drivers and Receivers PCI[2] PDO[3] PAUI Port PDI[3] Line Drivers and Receivers PCI[3] Internal Bias ...
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RELATED AMD PRODUCTS Part No. Description Am79C981 Integrated Multiport Repeater+ (IMR+™) Am79C982 b asic Integrated Multiport Repeater ( b IMR™) Am79C983A Integrated Multiport Repeater 2 (IMR2™) Am79C987 Hardware Implemented Management Information Base (HIMIB™) Am7990 Local Area Network Controller for Ethernet ...
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CONNECTION DIAGRAM DVSS Am79C988A ...
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LOGIC DIAGRAM LOGIC SYMBOL Pseudo Attachment Unit Interface (PAUI) Ports (4 Ports Ports TP PAUI PAUI TP PAUI TP PAUI TP Serial Interface PDO TXD+ ...
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ORDERING INFORMATION Standard Products AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of: Am79C988B Valid Combinations Am79C988B ...
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PIN DESCRIPTION Analog PDO 0-3 Pseudo AUI Data Output Input Single-ended receiver. Data input from the IMR2 device. PDI 0-3 Pseudo AUI Data Input Output Single-ended output driver. Data output to the IMR2 device. PCI 0-3 Pseudo AUI Collision Input ...
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FUNCTIONAL DESCRIPTION Overview The Am79C988A Quad Integrated Ethernet Transceiver ™ (QuIET ) device consists of four independent 10BASE-T transceivers which are compliant with the IEEE 802.3 Sec- tion 14 ( Medium Attachment Unit for 10BASE-T Cabling ) standard. The QuIET ...
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PAUI Ports The PAUI ports are functionally equivalent to AUI ports as described in IEEE 802.3, Section 7. However, they are single ended and, therefore, are not an exact match with the electrical specifications. PDO, PDI, and PCI are functionally ...
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Link Status The QuIET device reports the Link Status of each port. If Link Test is disabled, Link Status indicates a Link Pass Link Fail n 1 Link Pass Receive ...
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CMOS/PAUI Mode Selection This command sets the QuIET interface drivers (PDO, PDI, PCI driven at normal PAUI signal levels or CMOS voltage levels. The default is PAUI levels. Refer to the DC Characteristics table for voltage levels. K ...
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SYSTEMS APPLICATIONS 10BASE-T Repeaters The IMR2/QuIET chipset provides a system solution to designing 10BASE-T repeaters. Figure 3 shows the necessary connections between the IMR2 device and the QuIET device. Although only one QuIET device is shown for clarity, three QuIET ...
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IMR2 PDO0 PDO0 PDI0 PDI0 PCI0 PCI0 PDO1 PDO1 PDI1 PDI1 PCI1 PCI1 PDO2 PDO2 PDI2 PDI2 PCI2 PCI2 PDO3 PDO3 PDI3 PDI3 PCI3 PCI3 MCLK RST RST CLK ...
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IMR2 Device SDATA[3] SDATA[2] SDATA[1] SDATA[0] DIR[1] DIR[0] MCLK Reset CLK Figure 4. IMR2 Device To QuIET Device Serial Interface Backplane 0 Am79C983 IMR2 0 Backplane 1 Am79C983 IMR2 1 Backplane 2 Am79C983 IMR2 ...
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1:1 DO+ 78 DO- 1:1 DI+ AUI 200 Port DI- 1:1 CI+ 200 CI- Figure 6. AUI to PAUI Connections Am79C988A 0.1 F PDO ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature – +150 C Ambient Temperature Under Bias Supply Voltage ...
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Parameter Symbol Parameter Description V RXD Positive Squelch Threshold Ex- LTSQ+ tended Distance Mode V RXD Positive Squelch Threshold Ex- LTSQ- tended Distance Mode V RXD Post-Squelch Positive Threshold LTHS+ Extended Distance Mode V RXD Post-Squelch Negative Threshold LTHS- Extended ...
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SWITCHING CHARACTERISTICS over operating ranges unless otherwise specified Parameter Symbol Parameter Description Clock and Reset Timing t CLK Clock Period CLK t CLK Clock High CLKH t CLK Clock Low CLKL t CLK Rise Time CLKR t CLK Fall Time ...
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Parameter Symbol Parameter Description t Clock to High Impedance Output SSDOZ t DIR going HIGH to SDATA Input Valid SDS t DIR going LOW to SDATA Output Valid DDS Notes: 1. Parameter is not tested. 2. Uses switching test load. ...
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KEY TO SWITCHING WAVEFORMS WAVEFORM SWITCHING WAVEFORMS tCLKR RST INPUTS OUTPUTS Must be Will be Steady Steady May Will be Change Changing from from H ...
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SWITCHING WAVEFORMS tPWODO tPWKDO PDO TXD+ tTON TXD- tDODION PDI RXD tRON PDI PDO RXD tCON PCI tPWKDO tTSD tTSD tTSD tDODISD Figure 9. Transmit Signals tPWORD tPWKRD tRSD ...
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SWITCHING WAVEFORMS tPWLP PDO TXD PCI tJA tPERLP Figure 12. Transmit Link Beat Pulse 50% tJR Figure 13. Jabber Function Am79C988A 19880B- 50% 0V 19880B-17 ...
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SWITCHING WAVEFORMS CLK DIR { SDATA DIR { -0 SDATA tSDHD DIR { SDATA -1 DIR { SDATA DIR SDATA Figure 15. Serial Interface SDATA Transmit and Start Receive ...
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SWITCHING TEST CIRCUITS Test Pin Figure 17. Twisted Pair Switching Test Circuit VDD R Test Point 100pF 330* VSS R = 330 for PAUI 1k for SDATA *Not ...
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... Copyright © 1997 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD logo, and combinations thereof, and QuIET, IMR2, and PAUI are trademarks of Advanced Micro Devices, Inc. Product names used in this publication are for identification purposes only and may be trademarks of their respective companies. ...