29F040C-90 Macronix International Co., 29F040C-90 Datasheet

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29F040C-90

Manufacturer Part Number
29F040C-90
Description
Manufacturer
Macronix International Co.
Datasheet

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FEATURES
• 524,288 x 8 only
• Single power supply operation
• Fast access time: 55/70/90ns
• Compatible with MX29F040 device
• Low power consumption
• Command register architecture
• Auto Erase (chip & sector) and Auto Program
• Erase suspend/Erase Resume
P/N:PM1201
GENERAL DESCRIPTION
The MX29F040C is a 4-mega bit Flash memory orga-
nized as 512K bytes of 8 bits. MXIC's Flash memories
offer the most cost-effective and reliable read/write non-
volatile random access memory. The MX29F040C is
packaged in 32-pin PLCC, TSOP, PDIP. It is designed
to be reprogrammed and erased in system or in standard
EPROM programmers.
The standard MX29F040C offers access time as fast as
55ns, allowing operation of high-speed microprocessors
without wait states. To eliminate bus contention, the
MX29F040C has separate chip enable (CE#) and output
enable (OE#) controls.
MXIC's Flash memories augment EPROM functionality
with in-circuit electrical erasure and programming. The
MX29F040C uses a command register to manage this
functionality. The command register allows for 100% TTL
level control inputs and fixed power supply levels during
- 5.0V only operation for read, erase and program op-
eration
- 30mA maximum active current(5MHz)
- 1uA typical standby current
- Byte Programming (9us typical)
- Sector Erase
8 equal sectors of 64K-Byte each
- Automatically erase any combination of sectors with
Erase Suspend capability
- Automatically program and verify data at specified
address
- Suspends an erase operation to read data from, or
program data to, another sector that is not being erased,
4M-BIT [512K x 8] CMOS SINGLE VOLTAGE 5V ONLY
1
erase and programming, while maintaining maximum
EPROM compatibility.
MXIC Flash technology reliably stores memory con-
tents even after 100,000 erase and program cycles.
The MXIC cell is designed to optimize the erase
and program mechanisms. In addition, the combi-
nation of advanced tunnel oxide processing and low
internal electric fields for erase and programming
operations produces reliable cycling.
MX29F040C uses a 5.0V 10% VCC supply to per-
form the High Reliability Erase and auto Program/
Erase algorithms.
The highest degree of latch-up protection is
achieved with MXIC's proprietary non-epi process.
Latch-up protection is proved for stresses up to 100
milliamps on address and data pin from -1V to VCC
+ 1V.
• Status Reply
• Sector protect/chip unprotect for 5V only system
• Sector protection
• 100,000 minimum erase/program cycles
• 100,000 minimum erase/program cycles
• Latch-up protected to 100mA from -1V to VCC+1V
• Low VCC write inhibit is equal to or less than 3.2V
• Package type:
• Compatibility with JEDEC standard
• 20 years data retention
then resumes the erase
- Data# Polling & Toggle bit for detection of program
and erase cycle completion
- Hardware method to disable any combination of sec-
tors from program or erase operations
- Temporary sector unprotect allows code changes in
previously locked sectors
- 32-pin PLCC, TSOP or PDIP
- All Pb-free devices are RoHS Compliant
- Pinout and software compatible with single-power
supply Flash
EQUAL SECTOR FLASH MEMORY
MX29F040C
REV. 1.0, DEC. 20, 2005
The

Related parts for 29F040C-90

29F040C-90 Summary of contents

Page 1

... Suspends an erase operation to read data from, or program data to, another sector that is not being erased, GENERAL DESCRIPTION The MX29F040C is a 4-mega bit Flash memory orga- nized as 512K bytes of 8 bits. MXIC's Flash memories offer the most cost-effective and reliable read/write non- volatile random access memory. The MX29F040C is packaged in 32-pin PLCC, TSOP, PDIP ...

Page 2

... CE GND SECTOR STRUCTURE MX29F040C SECTOR ADDRESS TABLE Sector A18 A17 SA0 0 0 SA1 0 0 SA2 0 1 SA3 0 1 SA4 1 0 SA5 1 0 SA6 1 1 SA7 1 1 Note: All sectors are 64 Kbytes in size. ...

Page 3

... BLOCK DIAGRAM CONTROL CE# INPUT OE# WE# LOGIC ADDRESS LATCH A0-A18 AND BUFFER Q0-Q7 P/N:PM1201 MX29F040C PROGRAM/ERASE HIGH VOLTAGE FLASH ARRAY ARRAY SOURCE HV Y-PASS GATE PGM SENSE DATA AMPLIFIER HV PROGRAM DATA LATCH I/O BUFFER 3 WRITE STATE MACHINE (WSM) STATE REGISTER COMMAND DATA DECODER COMMAND DATA LATCH ...

Page 4

... The typical chip programming time at room temperature of the MX29F040C is less than 4.5 sec- onds. AUTOMATIC CHIP ERASE The entire chip is bulk erased using 10 ms erase pulses according to MXIC's Automatic Chip Erase algorithm ...

Page 5

... AAH 2AAH 55H 555H 80H 555H AAH AAH 2AAH 55H 555H 80H 555H AAH AAH 2AAH 55H 555H 80H 555H AAH 5 MX29F040C Fifth Bus Sixth Bus Cycle Cycle Data Addr Data Addr Data DDI 01H PD 2AAH 55H 555H 10H 2AAH 55H ...

Page 6

... TABLE 2. MX29F040C BUS OPERATION Pins Mode Read Silicon ID Manufacturer Code(1) Read Silicon ID Device Code(1) Read Standby Output Disable Write Sector Protect without 12V system (6) Chip Unprotect without 12V system (6) Verify Sector Protect/Unprotect without 12V system (7) Reset Notes : 1. Manufacturer and device codes may also be accessed via a command register write sequence. Refer to Table 1. ...

Page 7

... However, multiplexing high voltage onto address lines is not generally desired system design prac- tice. The MX29F040C contains a Silicon-ID-Read operation to supplement traditional PROM programming methodol- ogy. The operation is initiated by writing the read silicon ID command sequence into the command register. Fol- lowing the command write, a read cycle with A1=VIL,A0=VIL retrieves the manufacturer code of C2H ...

Page 8

... Q5 switches to '1' when an Auto Program or Auto Erase operation has exceeded the maximum timing limits. See "Q5:Exceeded Timing Limits " for more information. P/N:PM1201 MX29F040C (no erase verification command is required). Sector erase is a six-bus cycle operation. There are two "unlock" write cycles. These are followed by writing the set-up com- mand 80H. Two more " ...

Page 9

... Q7 and Q6 are equivalent to data written to these two bits, at which time the device returns to the Read mode (no program verify command is required). DATA# POLLING-Q7 The MX29F040C also features Data# Polling as a method to indicate to the host system that the Automatic Pro- gram or Erase algorithms are either in progress or com- pleted. ...

Page 10

... Automatic Erase algorithm is in process), or whether that sector is erase-suspended. Toggle Bit I is valid after P/N:PM1201 MX29F040C the rising edge of the final WE# or CE#, whichever hap- pens first pulse in the command sequence. Q2 toggles when the system reads at addresses within those sectors that have been selected for erasure ...

Page 11

... Please note that this is not a device failure condition since the device was incorrectly used. DATA PROTECTION The MX29F040C is designed to offer protection against accidental erasure or programming caused by spurious system level signals that may exist during power transi- tion. During power up the device automatically resets the state machine in the Read mode ...

Page 12

... POWER-UP SEQUENCE The MX29F040C powers up in the Read only mode. In addition, the memory contents may only be altered after successful completion of the predefined command se- quences. SECTOR PROTECTION WITHOUT 12V SYS- TEM The MX29F040C also feature a sector protection method in a system without 12V power supply. The programming equipment do not need to supply 12 volts to protect sec- tors ...

Page 13

... VCC = 5V 10%) MIN. TYP MAX -0.3 0.8 (NOTE 1) 0.7xVCC VCC + 0.3 0.45 2.4 13 MX29F040C UNIT CONDITIONS pF VIN = 0V pF VIN = 0V pF VOUT = 0V UNIT CONDITIONS uA VIN = GND to VCC uA VOUT = GND to VCC mA CE# = VIH uA CE# = VCC + 0.3V mA IOUT = 0mA, f=5MHz mA IOUT = 0mA, f=10MHz V ...

Page 14

... MIN. MAX. MIN. MAX Note : 1. tDF is defined as the time at which the output achieves the open circuit condition and data is no longer driven. 14 MX29F040C 29F040C-90 MIN. MAX. UNIT Conditions 90 ns CE#=OE#=VIL 90 ns OE#=VIL 35 ns CE#=VIL CE#=VIL 0 ...

Page 15

... ICCES is specified with the device de-selected. If the device is read during erase suspend mode, current draw is the sum of ICCES and ICC1 or ICC2. 4. All current are in RMS unless otherwise noted. 15 MX29F040C tDF tOH HIGH Z DATA Valid UNIT CONDITIONS mA IOUT=0mA, f=5MHz mA ...

Page 16

... MIN. 55 MIN. 35 MIN. 20 MIN. 0 MIN. 45 MIN. 30 MIN. 0 MIN. 0 MAX. 20 TYP. 4 MAX. 32 TYP. 0.7 MAX. 15 TYP. 9 MAX. 300 MIN. 50 MIN. 0 MIN MX29F040C Speed Option 70 90 UNIT ...

Page 17

... SWITCHING TEST CIRCUITS DEVICE UNDER TEST SWITCHING TEST WAVEFORMS for 29F040C-70 and 29F040C-90 0.7xVCC 0.45V AC TESTING: Inputs are driven at 0.7xVCC for a logic "1" and 0.45V for a logic "0". Input pulse rise and fall times are < 10ns. SWITCHING TEST WAVEFORMS for 29F040C-55 ...

Page 18

... COMMAND WRITE TIMING WAVEFORM VCC 5V VIH Addresses VIL tAS VIH WE# VIL tOES CE# VIH VIL tCS OE# VIH VIL VIH Data VIL P/N:PM1201 ADD Valid tAH tCEP tCWC tCH tDS tDH DIN 18 MX29F040C tCEPH1 REV. 1.0, DEC. 20, 2005 ...

Page 19

... Q4(Note 1) Q7 Command In Command #AAH (Q0~Q7) Note : (1). Q6:Toggle bit, Q5:Timing-limit bit, Q3: Time-out bit P/N:PM1201 MX29F040C ing after automatic verification starts. Device outputs DATA# during programming and DATA# after programming on Q7.(Q6 is for toggle bit; see toggle bit, Data# Polling, timing waveform) 2AAH 555H tCWC ...

Page 20

... Write Data 55H Address 2AAH Write Data A0H Address 555H Write Program Data/Address Toggle Bit Checking NO Invalid Command Auto Program Completed P/N:PM1201 START NO Q6 not Toggled YES Verify Byte Ok YES Auto Program Exceed Timing Limit 20 MX29F040C YES Reset REV. 1.0, DEC. 20, 2005 ...

Page 21

... Command In Command #AAH Command #55H (Q0~Q7) Note : (1). Q6:Toggle bit, Q5:Timing-limit bit, Q3: Time-out bit, Q2: Toggle bit P/N:PM1201 MX29F040C automatic erase starts. Device outputs 0 during erasure and 1 after erasure on Q7.(Q6 is for toggle bit; see toggle bit, Data# Polling, timing waveform) 555H 555H 2AAH tCWC ...

Page 22

... Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 10H Address 555H NO Toggle Bit Checking Q6 not Toggled YES NO Data# Polling YES Auto Chip Erase Completed 22 MX29F040C . YES Reset Auto Chip Erase Exceed Timing Limit REV. 1.0, DEC. 20, 2005 ...

Page 23

... Command Command Command Command Command Command Command Command #80H Command #AAH Command #55H Command #30H 23 MX29F040C Sector Sector Addressn Address1 tBAL tAETB Command Command In In Data# Polling Command Command In In Command #30H Command #30H REV. 1.0, DEC. 20, 2005 ...

Page 24

... START NO Toggle Bit Checking Invalid Command Q6 Toggled ? YES NO Last Sector to Erase YES NO Time-out Bit Checking Q3=1 ? YES NO Toggle Bit Checking Q6 not Toggled YES Data# Polling Auto Sector Erase Completed 24 MX29F040C . Reset Auto Sector Erase Exceed Timing Limit REV. 1.0, DEC. 20, 2005 ...

Page 25

... ERASE SUSPEND/ERASE RESUME FLOWCHART Note: If the system implements an endless erase suspend/resume loop, or the number of erase suspend/resume is exceeded 1024 times, then the 400us time delay must be put into consideration. P/N:PM1201 MX29F040C START Write Data B0H ERASE SUSPEND NO Toggle Bit checking Q6 not toggled ...

Page 26

... CE# Data Don't care (Note 2) A18-A16 Note1: Must issue "unlock for sector protect/unprotect" command before sector protection for a system without 12V provided. Note2: Except F0H P/N:PM1201 MX29F040C Toggle bit polling * See the following Note! Sector Address 26 Verify 01H F0H tOE REV. 1.0, DEC. 20, 2005 ...

Page 27

... WE# CE# Data Don't care (Note 2) Note1: Must issue "unlock for sector protect/unprotect" command before sector unprotection for a system without 12V provided. Note2: Except F0H P/N:PM1201 Toggle bit polling * See the following Note! 27 MX29F040C Verify 00H F0H tOE REV. 1.0, DEC. 20, 2005 ...

Page 28

... SECTOR PROTECTION ALGORITHM FOR SYSTEM WITHOUT 12V Increment PLSCNT No PLSCNT=32? Yes Device Failed P/N:PM1201 MX29F040C START PLSCNT=1 Write "unlock for sector protect/unprotect" Command(Table1) Set Up Sector Addr (A18, A17, A16) OE#=VIH,A9=VIH CE#=VIL,A6=VIL Activate WE# Pulse to start Data don't care Toggle bit checking ...

Page 29

... CHIP UNPROTECTION ALGORITHM FOR SYSTEM WITHOUT 12V Increment Sector Addr * It is recommended before unprotect whole chip, all sectors should be protected in advance. P/N:PM1201 MX29F040C START Protect All Sectors PLSCNT=1 Write "unlock for sector protect/unprotect" Command (Table 1) Set OE#=A9=VIH CE#=VIL,A6=1 Activate WE# Pulse to start ...

Page 30

... VCC 5V VID ADD VIH A9 VIL VIH ADD A0 VIL tACC A1 VIH VIL ADD VIH A2-A8 A10-A18 VIL CE# VIH VIL VIH WE# VIL VIH OE# VIL VIH DATA VIL Q0-Q7 P/N:PM1201 tACC tCE tOE tOH DATA OUT C2H 30 MX29F040C tDF tOH DATA OUT A4H REV. 1.0, DEC. 20, 2005 ...

Page 31

... Input Voltage with respect to GND on all pins except I/O pins Input Voltage with respect to GND on all I/O pins Current Includes all pins except Vcc. Test conditions: Vcc = 5.0V, one pin at a time. DATA RETENTION PARAMETER Data Retention Time P/N:PM1201 MX29F040C LIMITS MIN. TYP.(2) MAX.(3) 0 ...

Page 32

... ORDERING INFORMATION PART NO. Access Time Operating Current Standby Current Temperature (ns) MX29F040CQI-55 55 MX29F040CQI-70 70 MX29F040CQI-90 90 MX29F040CTI-55 55 MX29F040CTI-70 70 MX29F040CTI-90 90 MX29F040CPI-55 55 MX29F040CPI-70 70 MX29F040CPI-90 90 MX29F040CQI-55G 55 MX29F040CQI-70G 70 MX29F040CQI-90G 90 MX29F040CTI-55G 55 MX29F040CTI-70G 70 MX29F040CTI-90G 90 MX29F040CPI-55G 55 MX29F040CPI-70G 70 MX29F040CPI-90G 90 P/N:PM1201 MAX.(mA) MAX.(uA ...

Page 33

... PART NAME DESCRIPTION 040 P/N:PM1201 OPTION: G: Lead-free package blank: normal SPEED: 55:55ns 70:70ns 90: 90ns TEMPERATURE RANGE: I: Industrial (-40˚aC to 85˚ C PACKAGE: P: PDIP Q: PLCC T: TSOP REVISION: C DENSITY & MODE: 040 Equal Sector TYPE DEVICE: 29: Flash 33 MX29F040C REV. 1.0, DEC. 20, 2005 ...

Page 34

... PACKAGE INFORMATION P/N:PM1201 MX29F040C 34 REV. 1.0, DEC. 20, 2005 ...

Page 35

... P/N:PM1201 MX29F040C 35 REV. 1.0, DEC. 20, 2005 ...

Page 36

... P/N:PM1201 MX29F040C 36 REV. 1.0, DEC. 20, 2005 ...

Page 37

... REVISION HISTORY Revision No. Description 1.0 1. Removed "Preliminary" title 2. Removed commercial grade 3. Added access time: 55ns; Removed access time: 120ns P/N:PM1201 MX29F040C Page P1 All All 37 Date DEC/20/2005 REV. 1.0, DEC. 20, 2005 ...

Page 38

... MX29F040C MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. ...

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