LT6350HMS8#PBF Linear Technology, LT6350HMS8#PBF Datasheet - Page 20

• Manufacturer Part Number: LT6350HMS8#PBF
• Description: IC DIFF CONVERT/ADC DRIVER 8MSOP
• Manufacturer: Linear Technology
• Type: ADC Driverr

Specifications of LT6350HMS8#PBF

• Applications: Data Acquisition
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

LT6350
APPLICATIONS INFORMATION
R
expense of increased distortion due to increased loading of
op amp 1. Note that op amp 1 is loaded internally by the 1k
input resistor to op amp 2, and therefore external loading
should not be much heavier than 1k to avoid degrading
distortion performance.
When using R
of-two confi guration, wideband noise can be substantially
reduced by bypassing across R
always bypass at the +IN2 pin with a capacitor of at least
0.1μF as seen in the Typical Application schematic on the
front page. Alternatively, for systems that can tolerate
output voltage offsets, omitting R
mize output noise at the expense of larger output offset
voltage.
Using a single pole passive RC fi lter network at the output
of the LT6350, as shown in Figure 6, reduces the output
noise bandwidth and thereby increases the signal-to-noise
ratio of the system. For example, in a typical system with
output signals of 8V
an RC output fi lter with R
slightly increases the output spot noise from 8.2nV√Hz to
8.4nV√Hz, but will reduce the total integrated noise from
47μV (33MHz noise bandwidth) to 3.6μV (184kHz noise
bandwidth) and improve the SNR from 96dB to 118dB.
Keep in mind that long RC time constants in the output
fi lter can increase the settling time at the inputs of the
ADC; incomplete settling can cause gain errors or increase
apparent crosstalk in multiplexed systems.
20
G
and R
F
, will always result in lower output noise at the
F
equal to R
P-P
, and a signal bandwidth of 100kHz,
FILT
S
(for low offsets) in the gain-
= 100Ω and C
F
. For lowest output noise
+IN2
and R
DIFF
F
will mini-
= 6.8nF,
OUTPUT PHASE BALANCE
The topology of the LT6350 is that of a noninverting stage
followed by an inverting stage. This topology presents
a high impedance single-ended input and provides low
impedance differential outputs. The output of the inverting
buffer, OUT2, is slightly delayed with respect to the output
of the noninverting buffer, OUT1. In the LT6350, the delay
from OUT1 to OUT2 over an input bandwidth from DC to
the differential f
as shown in the group delay plot in the Typical Performance
Characteristics section of this data sheet. The delay is
equivalent to a small phase offset from the nominal 180°
phase of the differential outputs. The size of the phase
offset grows with frequency. The phase imbalance causes
a small frequency-dependent common mode component
to appear at the outputs. A practical measure of this effect
can be found in the balance specifi cation, which is defi ned
to be the change in output common mode level caused by
the presence of an output differential signal:
The balance of the LT6350 at any frequency, f, can be
approximated from the delay, t
The approximation is very good from low frequencies up
to frequencies where the balance approaches 20dB, about
10MHz for the LT6350. At DC, the balance is limited by
the matching of the internal resistors that set the gain in
the inverting buffer. 1% matching of the resistors limits
the balance to 52dB at DC. At frequencies near the f
point of the differential transfer function, additional phase
lag and gain rolloff also contribute to balance. See the
balance plot in the Typical Performance Characteristics
for a detailed picture of Balance vs Input Frequency.
Balance ≡ ((V
Balance (dB) ≅ 20 • log((4)/(2 • π • f • t
–3dB
OUTDIFF
frequency is a nearly constant 6.8ns,
/V
IN
)/(V
d
OUTCM
, between outputs:
/V
IN
d
))
))
–3dB
6350fb