MBM29F200BC-90PF Fujitsu, MBM29F200BC-90PF Datasheet

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MBM29F200BC-90PF

Manufacturer Part Number
MBM29F200BC-90PF
Description
MBM29F200BC-90PF2M (256K X 8/128K X 16) BIT
Manufacturer
Fujitsu
Datasheet

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FUJITSU SEMICONDUCTOR
FLASH MEMORY
CMOS
2M (256K
MBM29F200TC
Embedded Erase
FEATURES
• Single 5.0 V read, write, and erase
• Compatible with JEDEC-standard commands
• Compatible with JEDEC-standard world-wide pinouts
• Minimum 100,000 write/erase cycles
• High performance
• Sector erase architecture
• Boot Code Sector Architecture
• Embedded Erase
• Embedded Program
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/Busy output (RY/BY)
• Low Vcc write inhibit
• Erase Suspend/Resume
• Hardware RESET pin
• Sector protection
• Temporary sector unprotection
DATA SHEET
Minimizes system level power requirements
Uses same software commands as E
48-pin TSOP (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)
44-pin SOP (Package suffix: PF)
55 ns maximum access time
One 16K byte, two 8K bytes, one 32K byte, and three 64K bytes.
Any combination of sectors can be concurrently erased. Also supports full chip erase.
T = Top sector
B = Bottom sector
Automatically pre-programs and erases the chip or any sector
Automatically writes and verifies data at specified address
Hardware method for detection of program or erase cycle completion
Suspends the erase operation to allow a read in another sector within the same device
Resets internal state machine to the read mode
Hardware method disables any combination of sectors from write or erase operations
Hardware method temporarily enables any combination of sectors from write on erase operations.
TM
and Embedded Program
TM
Algorithms
TM
Algorithms
3.2 V
TM
are trademarks of Advanced Micro Devices, Inc.
-55/-70/-90
2
PROMs
8/128K
/MBM29F200BC
16) BIT
DS05-20867-3E
-55/-70/-90

Related parts for MBM29F200BC-90PF

MBM29F200BC-90PF Summary of contents

Page 1

... Hardware method disables any combination of sectors from write or erase operations • Temporary sector unprotection Hardware method temporarily enables any combination of sectors from write on erase operations. Embedded Erase TM and Embedded Program 8/128K /MBM29F200BC -55/-70/-90 2 PROMs TM are trademarks of Advanced Micro Devices, Inc. DS05-20867-3E 16) BIT ...

Page 2

... MBM29F200TC -55/-70/-90 PACKAGE 48-pin TSOP (I) Marking Side (FPT-48P-M19) 2 /MBM29F200BC Marking Side (FPT-48P-M20) -55/-70/-90 44-pin SOP Marking Side (FPT-44P-M16) ...

Page 3

... Fujitsu’s Flash technology combines years of EPROM and E of quality, reliability, and cost effectiveness. The MBM29F200TC/BC memory electrically erase the entire chip or all bits within a sector simultaneously via Fowler-Nordhiem tunneling. The bytes/words are programmed one byte/word at a time using the EPROM programming mechanism of hot electron injection. /MBM29F200BC -55/-70/- ...

Page 4

... MBM29F200TC Sector Architecture 4 /MBM29F200BC ( 16) 1FFFFH 64K byte 1DFFFH 64K byte 1CFFFH 64K byte 1BFFFH 32K byte 17FFFH 8K byte 0FFFFH 8K byte 07FFFH 16K byte 00000H MBM29F200BC Sector Architecture -55/-70/- 16) 3FFFFH 1FFFFH 2FFFFH 17FFFH 1FFFFH 0FFFFH 0FFFFH 07FFFH 07FFFH 03FFFH 05FFFH 02FFFH 03FFFH 01FFFH 00000H ...

Page 5

... Buffer State Control BYTE RESET Command Register CE OE Low V Detector /MBM29F200BC -55/-70/-90 MBM29F200TC/MBM29F200BC -55 — — - RY/BY Erase Voltage Generator Program Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer for Address Program/Erase Latch ...

Page 6

... N.C. 13 MBM29F200TC/MBM29F200BC RESET 12 Reverse Pinout WE 11 N. FPT-48P-M20 6 /MBM29F200BC TSOP ( BYTE ...

Page 7

... MBM29F200TC LOGIC SYMBOL RY/BY RESET BYTE /MBM29F200BC -55/-70/-90 Table 1 MBM29F200TC/BC Pin Configuration Pin Function Address Inputs Data Inputs/Outputs Chip Enable Output Enable OE Write Enable WE Ready-Busy Output RY/BY Hardware Reset Pin/ ...

Page 8

... Fujitsu standard products are available in several packages. The order number is formed by a combination of: MBM29F200 T C -55 DEVICE NUMBER/DESCRIPTION MBM29F200 2Mega-bit (256K 5.0 V-only Read, Write, and Erase 8 /MBM29F200BC PFTN PACKAGE TYPE PFTN = 48-Pin Thin Small Outline Package (TSOP (I)) Standard Pinout PFTR = 48-Pin Thin Small Outline Package (TSOP (I)) Reverse Pinout PF = 44-Pin Small Outline Package SPEED OPTION ...

Page 9

... Reset (Hardware)/Standby Legend Notes: 1. Manufacturer and device codes may also be accessed via a command register write sequence. Refer to Table 7. 2. Refer to the section on Sector Protection can /MBM29F200BC -55/-70/- ...

Page 10

... (MBM29F200TC =51H and MBM29F200BC = 57H for 8 mode; MBM29F200TC = 2251H and MBM29F200BC = 2257H for 16 mode). These two bytes/words are given in the tables 4.1 and 4.2. All identifiers for manufacturer and device will exhibit odd parity with DQ ...

Page 11

... Sector Protection The MBM29F200TC/BC features hardware sector protection. This feature will disable both program and erase operations in any number of sectors (0 through 6). The sector protection feature is enabled using programming equipment at the user’s site. The device is shipped with all sectors unprotected. /MBM29F200BC -55/-70/- ...

Page 12

... The Sector Unprotection mode is activated by setting the RESET pin to high voltage (12 V). During this mode, formerly protected sectors can be programmed or erased by selecting the sector addresses. Once the taken away from the RESET pin, all the previously protected sectors will be protected again. Refer to Figures 17 and 24. 12 /MBM29F200BC -55/-70/-90 on address pin ...

Page 13

... Sector Address Tables (MBM29F200TC Sector Address Tables (MBM29F200BC -55/-70/-90 Address Range 00000h to 0FFFFh 10000h to 1FFFFh ...

Page 14

... The read or eset operation is initiated by writing the read/reset command sequence into the command register. Microprocessor read cycles retrieve array data from the memory. The devices remain enabled for reads until the command register contents are altered. 14 /MBM29F200BC -55/-70/-90 MBM29F200TC/BC Command Definitions Second ...

Page 15

... Following the command write, a read cycle from address XX00H retrieves the manufacture code of 04H. A read cycle from address XX01H for 16 (XX02H for 8) returns the device code (MBM29F200TC = 51H and MBM29F200BC = 57H for 8 mode; MBM29F200TC = 2251H and MBM29F200BC = 2257H for 16 mode). (See Tables 4.1 and 4.2.) ...

Page 16

... Sector Erase time-out results in immediate termination of the time-out period and suspension of the erase operation. Writing the Erase Resume command resumes the erase operation. The addresses are “don’t cares” when writing the Erase Suspend or Erase Resume command. 16 /MBM29F200BC -55/-70/-90 , Sector Erase Timer.) Any command other than Sector 3 7 ...

Page 17

... are “DON’T CARES” because there is for 8 15 /MBM29F200BC -55/-70/-90 will stop toggling. The user must use the address of the 6 to determine if the erase operation has been suspended. Further writes 7 to toggle. (See the section toggle ...

Page 18

... This is a failure condition which indicates that the program or erase 5 cycle was not successfully completed. Data Polling is the only operating function of the devices under this 18 /MBM29F200BC -55/-70/-90 . Upon completion of the Embedded Program 7 ) may change asynchronously while the output ...

Page 19

... Furthermore, DQ can also be used to determine which sector is being erased. When the device is in the erase 2 mode, DQ toggles if this bit is read from the erasing sector. 2 /MBM29F200BC -55/-70/-90 never stops toggling. Once the device has exceeded timing limits, the toggle during the Embedded Erase Algorithm. If the 2 bit ...

Page 20

... V CC LKO to prevent unintentional writes when V If Embedded Erase Algorithm is interrupted, there is possibility that the erasing sector(s) cannot be used. 20 /MBM29F200BC -55/-70/-90 ) for at least 500 ns in order to properly reset the internal state machine bits are tri-stated. However, the command bus cycle is always ...

Page 21

... Writing is inhibited by holding any one must be a logical zero while logical one. Power-Up Write Inhibit Power-up of the device with The internal state machine is automatically reset to the read mode on power-up. /MBM29F200BC -55/-70/- initiate a write cycle CE and WE IL ...

Page 22

... Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. 22 /MBM29F200BC -55/-70/-90 , OE, RESET (Note 1) ................... –2 +7 OE, RESET pins are –0.5 V. During voltage transitions – ...

Page 23

... V –2.0 V Figure +2.0 V Figure 2 +14.0 V +13 +0 Note: This waveform is applied for A Figure 3 /MBM29F200BC -55/-70/- Maximum Negative Overshoot Waveform Maximum Positive Overshoot Waveform OE, and RESET. 9 Maximum Positive Overshoot Waveform -55/-70/-90 23 ...

Page 24

... DC operating current and the frequency dependent component CC (at 6 MHz). The frequency component typically is 2 mA/MHz, with active while Embedded Algorithm (program or erase progress Applicable to sector protection function not exceed /MBM29F200BC -55/-70/-90 Test Conditions ...

Page 25

... Input rise and fall times Input pulse levels: 0 3.0 V Timing measurement reference level Input: 1.5 V Output: 1.5 V Device Under Test Notes including jig capacitance 100 pF including jig capacitance L /MBM29F200BC -55/-70/-90 Test Setup — Min Max Max. IL — ...

Page 26

... Write Pulse Width (Note 2) WPP — Setup Time to WE Active (Note 2) OESP — Setup Time to WE Active (Note 2) CSP — t Recover Time from RY/ /MBM29F200BC -55/-70/-90 Description Min. Min. Min. Min. Min. Min. Read Min. Toggle and Data Polling Min. Min. Min. ...

Page 27

... BYTE Switching High to Output Active FHQV — t Program/Erase Valid to RY/BY Delay BUSY — t Delay Time from Embedded Output Enable Max. EOE Notes: 1. This does not include the preprogramming time. 2. These timing is for Sector Protection operation. /MBM29F200BC -55/-70/-90 Description -55 Min. 500 Min. 50 Max. 30 Min. 30 Max ...

Page 28

... MBM29F200TC SWITCHING WAVEFORMS • Key to Switching Waveforms Addresses High-Z Outputs Figure 5.1 28 /MBM29F200BC -55/-70/-90 WAVEFORM INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Be Change Changing from from May Will Be Change Changing from from “H” or “L” Changing ...

Page 29

... MBM29F200TC Addresses t RH RESET HIGH-Z Outputs Figure 5.2 AC Waveforms for Hardware Reset/Read Operations /MBM29F200BC -55/-70/- Addresses Stable t ACC Output Valid -55/-70/- ...

Page 30

... D is the output of the data written to the device. OUT 5. Figure indicates last two bus cycles out of four bus cycle sequence. 6. These waveforms are for the Figure 6 30 /MBM29F200BC -55/-70/-90 Data Polling ...

Page 31

... D is the output of the data written to the device. OUT 5. Figure indicates last two bus cycles out of four bus cycle sequence. 6. These waveforms are for the Figure 7 Alternate CE Controlled Program Operation Timings /MBM29F200BC -55/-70/-90 Data Polling ...

Page 32

... Addresses GHWL WE Data t VCS V CC Notes the sector address for Sector Erase. Addresses = 555H (Word), AAAH (Byte) for Chip Erase. 2. These waveforms are for the Figure 8 32 /MBM29F200BC -55/-70/-90 2AAH 555H 555H 555H WPH ...

Page 33

... WE t OES OE Data Toggle *DQ stops toggling (The device has completed the Embedded operation). 6 Figure 10 AC Waveforms for Toggle Bit I during Embedded Algorithm Operations /MBM29F200BC -55/-70/- Valid Data t WHWH1 Output Flag ...

Page 34

... WE RY/BY Figure 11 RY/BY Timing Diagram during Program/Erase Operations WE RESET RY/BY CE BYTE ELFH Figure 12 34 /MBM29F200BC -55/-70/-90 The rising edge of the last WE signal READY Figure 12 RESET/RY/BY Timing Diagram Data Output Data Output ( ( FHQV A -1 Timing Diagram for Word Mode Configuration ...

Page 35

... MBM29F200TC CE BYTE t ELFL Figure 13 Timing Diagram for Byte Mode Configuration BYTE Figure 14 BYTE Timing Diagram for Write Operations /MBM29F200BC -55/-70/-90 Data Output Data Output ( ( FLQZ The falling edge of the last write pulse ...

Page 36

... VLHT WE CE Data t VLHT V CC SAX = Sector Address for initial sector SAY = Sector Address for next sector Note byte mode Figure 15 36 /MBM29F200BC -55/-70/- WPP OESP VLHT t CSP AC Waveforms for Sector Protection Timing Diagram -55/-70/-90 SAY t VLHT 01H t OE ...

Page 37

... Erasing WE Erase Erase Suspend Read Toggle DQ and with OE Note read from the erase-suspended sector. 2 /MBM29F200BC -55/-70/-90 t VIDR Program or Erase Command Sequence VCS Temporary Sector Unprotection Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program Figure ...

Page 38

... MBM29F200TC EMBEDDED ALGORITHMS Increment Address * : The sequence is applied for The addresses differ from Figure 17 38 /MBM29F200BC -55/-70/-90 Start Write Program Command Sequence (See Below) Data Polling Device No Last Address ? Yes Programming Completed Program Command Sequence* (Address/Command): 555H/AAH 2AAH/55H 555H/A0H Program Address/Program Data 16 mode ...

Page 39

... Chip Erase Command Sequence* (Address/Command): 555H/AAH 2AAH/55H 555H/80H 555H/AAH 2AAH/55H 555H/10H * : The sequence is applied for The addresses differ from 8 mode. Figure 18 /MBM29F200BC -55/-70/-90 Start Write Erase Command Sequence (See Below) Data Polling or Toggle Bit Successfully Completed Erasure Completed Individual Sector/Multiple Sector* Erase Command Sequence (Address/Command): ...

Page 40

... MBM29F200TC Note rechecked even /MBM29F200BC -55/-70/-90 Start Read Byte ( Addr Yes DQ = Data Yes Read Byte ( Addr Yes DQ = Data Pass Fail = “1” because DQ may change simultaneously with Figure 19 Data Polling Algorithm ...

Page 41

... MBM29F200TC No Note rechecked even changing to “1”. 5 Figure 20 /MBM29F200BC -55/-70/-90 Start Read Byte ( Addr. = “H” or “L” Toggle 6 ? Yes Yes Read Byte ( Addr. = “H” or “L” Toggle 6 ? Yes Fail Pass = “ ...

Page 42

... MBM29F200TC Increment PLSCNT PLSCNT = 25? Remove V Write Reset Command Device Failed * : byte mode /MBM29F200BC -55/-70/-90 Start Setup Sector Addr 16 PLSCNT = RESET = Activate WE Pulse Time out 100 ...

Page 43

... MBM29F200TC Notes: 1. All protected sectors unprotected. 2. All previously protected sectors are protected once again. Figure 22 Temporary Sector Unprotection Algorithm /MBM29F200BC -55/-70/-90 Start RESET = V ID (Note 1) Perform Erase or Program Operations RESET = V IH Temporary Sector Unprotection Completed (Note 2) -55/-70/-90 43 ...

Page 44

... MHz A SOP PIN CAPACITANCE Parameter Parameter Description Symbol C Input Capacitance IN C Output Capacitance OUT C Control Pin Capacitance IN2 Note: Test conditions T = 25° 1.0 MHz A 44 /MBM29F200BC -55/-70/-90 Limits Min. Typ. Max. — — 16 200 — 8 150 — 2.1 5.0 100,000 — ...

Page 45

... LEAD No. 1 INDEX 24 20.00±0.20 (.787±.008) * 18.40±0.20 (.724±.008) 0.10(.004) 19.00±0.20 (.748±.008) 1996 FUJITSU LIMITED F48029S-2C-2 C /MBM29F200BC -55/-70/-90 *: Resin protrusion. (Each side: 0.15(.006) Max) 48 Details of "A" part "A" 0.15(.006) 0.25(.010 12.00±0.20 (.472±.008) 11.50REF (.460) ...

Page 46

... INDEX 24 19.00±0.20 (.748±.008) 0.10(.004) * 18.40±0.20 (.724±.008) 20.00±0.20 (.787±.008) 1996 FUJITSU LIMITED F48030S-2C /MBM29F200BC -55/-70/-90 *: Resin protrusion. (Each side: 0.15(.006) Max) 48 Details of "A" part "A" 25 0.50±0.10 (.020±.004) 0.15±0.10 (.006±.002) 0.50(.0197) -55/-70/-90 ...

Page 47

... MBM29F200TC (Continued) 44-pin plastic SOP (FPT-44P-M16) +0.25 28.45 –0.20 44 INDEX LEAD No. 1 1.27(.050)TYP 0.10(.004) 26.67(1.050)REF 1998 FUJITSU LIMITED F44023S-4C-4 C /MBM29F200BC -55/-70/-90 +.010 1.120 –.008 23 13.00±0.10 16.00±0.20 (.512±.004) (.630±.008) 22 +0.10 +0.10 0.40 0.20 .008 –0.05 –0.15 Ø0.13(.005) M +.004 (Stand off) .016 –.002 -55/-70/-90 2.35± ...

Page 48

... Tel: (65) 281-0770 Fax: (65) 281-0220 http://www.fmap.com.sg/ F9903 FUJITSU LIMITED Printed in Japan 48 /MBM29F200BC -55/-70/-90 All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use ...

Page 49

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