HY57V643220DT-6 Hynix Semiconductor, HY57V643220DT-6 Datasheet
HY57V643220DT-6
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HY57V643220DT-6 Summary of contents
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Document Title 4Bank x 512K x 32bits Synchronous DRAM Revision History Revision No. 0.1 Initial Draft 0.2 Removed Preliminary 1. Updated Output Load Capacitance for Access Time Measurement CL = 30pF in AC OPERATING TEST CONDITION 0.3 2. Updated the ...
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... ORDERING INFORMATION Part No. HY57V643220D(L/S)T(P)-45 HY57V643220D(L/S)T(P)-5 HY57V643220D(L/S)T(P)-55 HY57V643220D(L/S)T(P)-6 HY57V643220D(L/S)T(P)-7 Note 1. HY57V643220DT(P) Series : Normal Power 2. HY57V643220DLT(P) Series : Low Power 3. HY57V643220DST(P) Series : Super Low Power 4. HY57V643220D(L/S)T Series : Leaded 5. HY57V643220D(L/S)TP Series : Lead Free This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for use of circuits described ...
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TSOP II CONFIGURATION 1 VDD 2 DQ0 3 VDDQ DQ1 DQ2 VSSQ DQ3 DQ4 VDDQ DQ5 DQ6 VSSQ DQ7 NC VDD DQM0 /WE /CAS /RAS 20 / BA0 BA1 A10/ DQM2 VDD NC ...
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Pin FUNCTION DESCRIPTIONS Pin Pin Name CLK Clock CKE Clock Enable CS Chip Select BA0, BA1 Bank Address A0 ~ A10 Address Row Address Strobe, RAS, CAS, WE Column Address Strobe, Write Enable DQM0~3 Data Input/Output Mask DQ0 ~ DQ31 ...
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FUNCTIONAL BLOCK DIAGRAM 512Kbit x 4banks x 32 I/O Low Power Synchronous DRAM Self refresh logic & timer CLK Row Active CKE CS RAS Refresh CAS Column Active WE DQM0~3 Bank Select Address A0 Register A1 A10 BA1 BA0 Rev. ...
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BASIC FUNCTIONAL DESCRIPTION Mode Register BA1 BA0 A11 A10 Code A9 Write Mode 0 Burst Read and Burst Write 1 Burst Read and Single Write CAS Latency CAS Latency ...
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ABSOLUTE MAXIMUM RATING Parameter Ambient Temperature Storage Temperature Voltage on Any Pin relative to VSS Voltage on VDD relative to VSS Voltage on VDDQ relative to VSS Short Circuit Output Current Power Dissipation . Soldering Temperature Time DC OPERATING CONDITION ...
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Note 1. Output DC Output Load Circuit DC CHARACTERRISTICS I Parameter Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage Note : 1. VIN = 0 to 3.6V, All other balls are not tested under VIN =0V ...
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... I depend on output loading and cycle rates. Specified values are measured with the output open DD1 DD4 2. Min. of tRC (Refresh RAS cycle time) is shown at AC CHARACTERISTICS II 3. HY57V643220DT(P) Series 4. HY57V643220DLT(P) Series 5. HY57V643220DST(P) Series Rev. 0.3 / Sep. 2004 4Banks x 512K x 32bits Synchronous DRAM ...
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AC CHARACTERISTICS I Parameter Symbol CAS t CK3 Latency=3 System Clock Cycle Time CAS t CK2 Latency=2 Clock High Pulse Width t CHW Clock Low Pulse Width t CLW CAS t AC3 Latency=3 Access Time From Clock CAS t AC2 ...
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AC CHARACTERISTICS II Parameter RAS Operation Cycle Time RAS Auto Refresh Cycle Time RAS to CAS Delay RAS Active Time RAS Precharge Time RAS to RAS Bank Active Delay CAS to CAS Delay Write Command to Data-In Delay Data-in to ...
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COMMAND TRUTH TABLE Command CKEn-1 Mode Register Set H No Operation H Bank Active H Read H Read with Autoprecharge Write H Write with Autoprecharge Precharge All Banks H Precharge selected Bank Burst Stop H DQM H Auto Refresh H ...
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PACKAGE INFORMATION JEDEC STANDARD 400mil 86pin TSOP-II with 0.5mm pin pitch 22.327(0.8790) 22.149(0.8720) 0.50(0.0197) 0.05 Rev. 0.3 / Sep. 2004 HY57V643220D(L/S)T(P) Series 4Banks x 512K x 32bits Synchronous DRAM 11.938(0.4700) 11.735(0.4620) 10.262(0.4040) 10.058(0.3960) 0.150(0.0059) 0.050(0.0020) 0.21(0.008) 5deg 0deg 0.18(0.007) 0.05 ...