ACE9030IW Mitel, ACE9030IW Datasheet

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ACE9030IW

Manufacturer Part Number
ACE9030IW
Description
3.6-5.0V; receiver and transmitter interface. For AMPS and TACS cellular telephone, 2-way radio systems
Manufacturer
Mitel
Datasheet

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synthesiser, intended for use in a cellular telephone.
and control levels such as transmit power in the telephone,
circuits to demodulate the frequency modulated signal to
audio, and a crystal oscillator with a frequency multiplier.
both with optional speed-up to select the desired channel. The
Auxiliary synthesiser is used for the transmit-receive offset
and for modulation.
software selected power saving modes for battery economy.
The circuit techniques used have been chosen to minimise
external components and at the same time give very high
performance.
FEATURES
RELATED PRODUCTS
ACE9030 is part of the following chipset:
Supersedes February 1997 edition, DS4288 - 1.4
Low Power Low Voltage (3·6 to 5·0 V) Operation
Serial Bus Controlled Power Down Modes
Simple Programming Format
Reference Crystal Oscillator
Frequency Multiplier for LO2 Signal
8·064 MHz Output for External Microcontroller
Main Synthesiser with Fractional-N Option
Auxiliary Synthesiser
Main Synthesiser Speed-up Options
FM Discriminator for 450 kHz or 455 kHz I.F. Signal
Radio System Control Interface
Part of the ACE Integrated Cellular Phone Chipset
TQFP 64 pin 0·4 mm and 0·5 mm pitch packages
ACE9030 is a combined radio interface circuit and twin
The radio interface section contains circuits to monitor
The Main synthesiser has normal and fractional-N modes
Both sections are controlled by a serial bus and have
ACE9020 Receiver and Transmitter Interface
ACE9040 Audio Processor
ACE9050 System Controller and Data Modem
MULTIPLIER
CRYSTAL
POLLING
ADC
OSCILLATOR
CRYSTAL
INTERFACE
BUS
Fig. 2 ACE9030 Simplified Block Diagram
8 MHz
PLL
DETECT
LOCK
TRIMMING
DACs
Radio Interface and Twin Synthesiser
APPLICATIONS
ORDERING INFORMATION
Industrial temperature range
TQFP 64 lead 10 x 10 mm, 0·5 mm pitch
ACE9030M/IW/FP1N - shipped in trays and dry packed
ACE9030M/IW/FP1Q - tape & reel and dry packed
TQFP 64 lead 7 x 7 mm, 0·4 mm pitch
ACE9030M/IW/FP2N - shipped in trays and dry packed
ACE9030M/IW/FP2Q - tape & reel and dry packed
SYNTHESISER
Note: Pin 1 is identified by moulded spot
MODMIN
VDDSUB
MODMP
AMPS and TACS Cellular Telephone
Two-way Radio Systems
DOUT3
DOUT4
AMPP2
AMPN2
AMPP1
AMPN1
ADC2A
ADC2B
TWIN
AMP01
DAC3
ADC4
TEST
PDA
and by coding orientation
MIXER
AFC
Fig.1 Pin connections - top view
LIMITER
AMP &
OUTPUTS
DIGITAL
ACE9030
DEMOD.
AUDIO
DS4288 - 2.0 January 1998
ACE9030
L.F. AMPS
DOUT0
VDDX
DOUT1
VDDA
VSSA
LO2
ADC1
ADC3A
ADC3B
ADC5
DOUT8
DAC2
DAC1
DOUT2
CIN1
CIN2
VP64
FP64

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ACE9030IW Summary of contents

Page 1

Supersedes February 1997 edition, DS4288 - 1.4 ACE9030 is a combined radio interface circuit and twin synthesiser, intended for use in a cellular telephone. The radio interface section contains circuits to monitor and control levels such as transmit power in ...

Page 2

ACE9030 AMPP1 AMPN1 AMPP2 AMPN2 ADC1 ADC2A ADC2B ADC3A ADC3B ADC4 ADC5 AFCIN OSC8 C8B PLL. CLK8 MULT LO2 x3, x5 CIN2 CRYSTAL OSC. CIN1 LATCHB VDDSUB2 VDDSUB DECOUP VDDSA VSSSA FIM FIMB CL DATA LATCHC TEST TEST SEL. FIA ...

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PIN DESCRIPTIONS The relevant supplies (V ) and grounds (V DD Pin No. Name Description 1 AMPO2 LF amplifier 2 output. 2 RXCD Receive carrier detect (ADC1 comparator) output. 3 LATCHC Synthesiser programme enable input. 4 LATCHB Radio interface programme ...

Page 4

ACE9030 ABSOLUTE MAXIMUM RATINGS Supply voltage from ground (any V to any Supply voltage difference (any V to any other Input voltage (any input pin to its local V and V SS ...

Page 5

ELECTRICAL CHARACTERISTICS These characteristics apply over these ranges of conditions (unless otherwise stated – AMB D.C. Characteristics Parameter Power supply Supply current, Radio Interface: Sleep mode Fully operating (excluding I ) ...

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ACE9030 ELECTRICAL CHARACTERISTICS These characteristics apply over these ranges of conditions (unless otherwise stated – AMB D.C. Characteristics (continued) Parameter Synthesiser charge pump current Current setting resistor R SMA Current setting ...

Page 7

ELECTRICAL CHARACTERISTICS These characteristics apply over these ranges of conditions (unless otherwise stated – AMB A.C. Characteristics Parameter CONTROL BUS Clock rate CL input Clock duty cycle CL input t , ...

Page 8

ACE9030 ELECTRICAL CHARACTERISTICS These characteristics apply over these ranges of conditions (unless otherwise stated – all V AMB A.C. Characteristics (continued) Parameter LOW FREQUENCY AMPLIFIERS (1 and 2) Voltage Gain Input Offset ...

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ELECTRICAL CHARACTERISTICS These characteristics apply over these ranges of conditions (unless otherwise stated – all V AMB A.C. Characteristics (continued) Parameter LO2 Multiplier Amplitude Reference frequency content of output 2nd, 4th harmonic ...

Page 10

ACE9030 TIMING WAVEFORMS FIM or FIA FIMB or FIAB DATA D2 CL LATCHB or LATCHC INTO ACE9030 DATA D0 DATA OUTPUT DRIVE FROM ACE9030 CL 1 LATCHB 10 SIGNAL PERIOD TIMING SKEW Fig. 6 Synthesiser Inputs ...

Page 11

FUNCTIONAL DESCRIPTION - CONTROL BUS The functions of the ACE9030 fall into two separate groups, the Radio Interface and the Synthesisers. The common control bus splits the input strings differ- ently for these two sections so this bus operation is ...

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ACE9030 Summary of Normal Commands - DATA2 bits Normal commands are always a request for data; the ADC registers to be read are defined by Y1 and Y0 in DATA3. A normal command will also end ...

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Radio Interface Bus - Transmit The ACE9030 only drives the bus in response to a request for data by a Normal command as described above. To avoid any bus contention, there is a delay from the end of a data ...

Page 14

ACE9030 Data is accepted by the circuit on the rising edge of LATCHC. Programmable divider ratios will be changed at their next re-load whole comparison period after the LATCHC edge. Normal channel changes require only word ...

Page 15

FUNCTIONAL DESCRIPTION - BLOCKS IN THE RADIO INTERFACE Power-On Reset Generator To ensure a tidy start-up there is an internal power-on detector to initialise various registers. This initialisation leaves the Radio Interface in Sleep mode with the crystal and 8·064 ...

Page 16

ACE9030 REF.CLOCK (XO) COMP. FREQ. (MAIN) TIME WINDOW (MAIN) PROG. DIVIDER (MAIN) MAIN LOCK AUX.LOCK, DERIVED SIMILARLY LOCK Pulses can occur on the LOCK signal at a rate up to the higher of the Main and Auxiliary comparison frequencies, and ...

Page 17

The ADC data in the five registers is read in response to a Normal command, with the two results to be output being selected by two bits of DATA3: DATA1 DATA2 xxxxxxxx 01xxxxxx where Y Y are decoded to select: ...

Page 18

ACE9030 DAC2 DAC2 CIN1 CIN2 Fig. 14 Crystal Oscillator Trimming Circuit with Typical Component Values Crystal Multiplier for LO2 To mix the first intermediate frequency signal down to the second IF a ...

Page 19

MHz Oscillator RATIO, FROM BUS CRYSTAL FREQUENCY (XO) VCO RATIO, FROM BUS RANGE & OFFSET FROM BUS An 8·064 MHz oscillator OSC8 is provided to drive the ACE9050 System Controller through pin CLK8. ACE9050 further drives the ACE9040 Audio ...

Page 20

ACE9030 C8B to close the loop. An integration is needed to set the VCO onto the correct frequency and other components can then ensure loop stability. Enough filtering must be provided to give a clock output suitable for all of ...

Page 21

The I.F. signal is digitised at a rate set by the crystal in use and by the divider D in figure 18 and so will be in ...

Page 22

ACE9030 INPUT ROLLING PAIRS OF SAMPLES TO EX-OR GATE FOR COMPARISON OUTPUT phase effect of f.m. increases as more cycles are exam- ined. The modulation lines are drawn as the phase change on the real input waveform but the separation ...

Page 23

V. Removing the arbitrary 1 kHz, the gain at the exclusive- OR gate is given by: Gain = 2 x Delay in I.F. cycles x V with the units of volts per Hertz of deviation. To ...

Page 24

ACE9030 FUNCTIONAL DESCRIPTION - BLOCKS IN THE SYNTHESISERS There are two synthesisers in the ACE9030 for use by the radio system, a Main loop to set the first local oscillator to the frequency needed for the channel to be received ...

Page 25

Auxiliary Synthesiser FIA FIAB The Auxiliary Synthesiser operates with an input fre- quency up to 135 MHz. The input buffer will amplify and limit a small amplitude sinewave signal and so can be driven from the ACE9020 VCO directly. There ...

Page 26

ACE9030 Fractional-N mode When selected this mode is permanently active and by interpolating channels between comparison frequency steps allows a higher comparison frequency to give both a faster channel change time and a lower comparison sideband level. The higher comparison ...

Page 27

COMPARISON FREQUENCY and so increment the total division. To avoid loop modulation due to the accumulating phase shift at the fractional frequency, a compensation charge must also be driven onto the loop filter to track the accumulated phase error so ...

Page 28

ACE9030 larger current. The charge pumps on PDI are only used in speed-up and then drive the integrating capacitor Ci directly. The control signals Ø and Ø UP DOWN phase detector and have a duration proportional to the phase error, ...

Page 29

An output to drive the phase comparator is generated from the N1 load signal at the start of each cycle, giving a pulse every (N1 + N2) counts and to help minimise phase noise in the complete synthesiser this pulse ...

Page 30

ACE9030 The reference divider needs to produce the main com- parison frequency of 12·5 kHz from the crystal at 14·85 MHz, a ratio of 1188, which can be formed 1188 followed select giving ...

Page 31

Increment Accumulator ( = NF ) value ...previous values and so on... Table 7 disturbed by the variations in division ...

Page 32

ACE9030 The value of SF can be found from any channel but to get a quick estimate the highest frequency can be considered as there is a fixed upper limit 256 so: CN(max (max) ...

Page 33

DOWN due to phase error COMPENSATION PULSE 156 ns Fig. 28 Fractional-N Phase Error And Compensation Pulse not ramp in size and that the loop somehow stays on the correct frequency: Average phase error: = mid-range ACC x 0·125 ns ...

Page 34

... The values of the components in these filters may be calculated with the help of appendix AB43 in the Personal Communications Handbook or for a more complete analysis the application note AN94, available from Mitel Semiconduc- tor Marketing Department, may be used. This note was written specifically for the NJ88C33 synthesiser but the mathematics apply equally well to the ACE9030 ...

Page 35

MHz crystal; the term f used to refer to the exact crystal frequency in the following calculations. Thus Main synthesiser (nominally 915·030 MHz) gener- ates 30501 495 = f CRYSTAL CRYSTAL ...

Page 36

ACE9030 5V 5V VHF VCC TANK TX POWER REF. LEVEL TX POWER OPTIONAL CONTROL BUFFER FOR DAC3 BATTERY LEVEL SENSOR CONTROL & DATA ACE9040 AUDIO PROCESSOR M.O. EARPIECE Fig. 31 Complete cellular terminal, showing details of ACE9030 typical application. 36 ...

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... Mitel. This publication is issued to provide information only and (unless agreed by Mitel in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other information appearing in this publication are subject to change by Mitel without notice. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specifi ...

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