MPC8245 Freescale Semiconductor, Inc, MPC8245 Datasheet
MPC8245
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MPC8245 Summary of contents
Page 1
... PCI and the other standard interfaces. Also, a high-performance memory controller supports various types of ROM and SDRAM. The MPC8245 is the second of a family of products that provide system-level support for industry-standard interfaces with an MPC603e processor core ...
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... Controller PIC 5 IRQs/ Interrupt 16 Serial Controller/ Interrupts Timers DUART Watchpoint Facility MPC8245 Integrated Processor Hardware Specifications, Rev Processor Branch PLL Processing Instruction Unit Unit (BPU) (64-Bit) Two-Instruction Dispatch System Integer Register Unit Unit (IU) (SRU) Peripheral Logic Bus ...
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... The interface uses a 64- or 32-bit data bus (depending on memory data bus width) and a 32-bit address bus along with control signals that enable the interface between the processor and peripheral logic to be optimized for performance. PCI accesses to the MPC8245 memory space are passed to the processor bus for snooping when snoop mode is enabled. ...
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... PCI memory-to-local memory — Message unit – Two doorbell registers – Two inbound and two outbound messaging registers – message interface 2 2 — controller with full master/slave support that accepts broadcast messages MPC8245 Integrated Processor Hardware Specifications, Rev Freescale Semiconductor ...
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... Programmable input and output signals with watchpoint capability — Error injection/capture on data path — IEEE Std 1149.1® (JTAG)/test interface 3 General Parameters The following list summarizes the general parameters of the MPC8245: Technology 0.25-µm CMOS, five-layer metal Die size 49.2 mm Transistor count 4 ...
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... Note that this temperature range does not apply to the 400 MHz parts. For details, refer to the hardware specifications addendum MPC8245ECSO2AD. 4.1.2 Recommended Operating Conditions Table 2 provides the recommended operating conditions for the MPC8245. Some voltage values do not apply to the 400-MHz parts. For details, refer to the hardware specifications addendum MPC8245ECSO2AD. Table 2. Recommended Operating Conditions Characteristic ...
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... DD for a maximum during power-on reset and power-down sequences. 12.This voltage is the input to the filter discussed in at the AV pin, which may be reduced from V DD MPC8245 Integrated Processor Hardware Specifications, Rev. 10 Freescale Semiconductor Symbol PCI inputs All other inputs + when LV is connected to a 5.0-V DC power supply. ...
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... SDRAM_SYNC_IN clock cycle for the device the nonreset state. 6. PLL_CFG signals must be driven on reset and must be held for at least 25 clock cycles after the negation of HRST_CTRL and HRST_CPU in order to be latched. Figure 2. Supply Voltage Sequencing and Separation Cautions MPC8245 Integrated Processor Hardware Specifications, Rev ...
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... Figure 4 and Figure 5 show the undershoot and overshoot voltage of the PCI interface for the 3.3- and 5-V signals, respectively. Overvoltage Waveform Undervoltage Waveform Figure 4. Maximum AC Waveforms for 3.3-V Signaling MPC8245 Integrated Processor Hardware Specifications, Rev. 10 Freescale Semiconductor GND Not to Exceed 10 SDRAM_CLK Figure 3 ...
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... Overvoltage Waveform Undervoltage Waveform Figure 5. Maximum AC Waveforms for 5-V Signaling 4.2 DC Electrical Characteristics Table 3 provides the DC electrical characteristics for the MPC8245 at recommended operating conditions. At recommended operating conditions (see Characteristic Input high voltage PCI only, except PCI_SYNC_IN Input low voltage PCI only, except PCI_SYNC_IN ...
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... For all others with table entry. 5. See driver bit details for output driver control register (0x73) in the MPC8245 Integrated Processor Reference Manual. 6. See Chip Errata No the MPC8245/MPC8241 RISC Microprocessor Chip Errata. MPC8245 Integrated Processor Hardware Specifications, Rev. 10 Freescale Semiconductor Table ...
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... Power saving mode data measured with only two PCI_CLKs and two SDRAM_CLKs enabled. 7. The typical minimum I/O power values were results of the MPC8245 performing cache resident integer operations at the slowest frequency combination of 33:66:200 (PCI:Mem:CPU) MHz. 8. The typical maximum OV ...
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... Thermal Characteristics Table 6 provides the package thermal characteristics for the MPC8245. For details, see “Thermal Management.” Characteristic Junction-to-ambient natural convection (Single-layer board—1s) Junction-to-ambient natural convection (Four-layer board—2s2p) Junction-to-ambient (@200 ft/min) (Single-layer board—1s) Junction-to-ambient (@200 ft/min) (Four layer board— ...
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... Electrical and Thermal Characteristics Table 7 provides the operating frequency information for the MPC8245 at recommended operating conditions (see Table 2) with Characteristic Processor frequency (CPU) Memory bus frequency PCI input frequency Notes: 1. For details, refer to the hardware specifications addendum MPC8245ECSO2AD. 2. Caution: The PCI_SYNC_IN frequency and PLL_CFG[0:4] settings must be chosen such that the resulting peripheral logic/memory bus frequency and CPU (core) frequencies do not exceed their respective maximum or minimum operating frequencies ...
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... SDRAM_SYNC_OUT to SDRAM_SYNC_IN in ns; 6.25 inches of loop length (unloaded PC board runner) corresponds to approximately delay. For details about how Freescale application note AN2164, MPC8245/MPC8241 Memory Clock Design Guidelines, for details on MPC8245 memory clock design. 7. Rise and fall times for the OSC_IN input is guaranteed by design and characterization. OSC_IN input rise and fall times are not tested ...
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... DLL lock range, there may be slightly more jitter in the output clock of the DLL; that is, the phase comparator shifts the clock between adjacent tap points. Refer to the Freescale application note AN2164, MPC8245/MPC8241 Memory Clock Design Guidelines: Part 1, for details on DLL modes and memory design. ...
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... Figure 7. DLL Locking Range Loop Delay Versus Frequency of Operation for DLL_Extend=0 MPC8245 Integrated Processor Hardware Specifications, Rev. 10 Freescale Semiconductor Propagation Delay Time (ns) loop and Normal Tap Delay Electrical and Thermal Characteristics ...
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... Electrical and Thermal Characteristics 30 27.5 25 22.5 20 17.5 15 12.5 10 7.5 0 Figure 8. DLL Locking Range Loop Delay Versus Frequency of Operation for DLL_Extend=1 MPC8245 Integrated Processor Hardware Specifications, Rev Propagation Delay Time (ns) loop and Normal Tap Delay 4 5 Freescale Semiconductor ...
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... Figure 9. DLL Locking Range Loop Delay Versus Frequency of Operation for DLL_Extend=0 MPC8245 Integrated Processor Hardware Specifications, Rev. 10 Freescale Semiconductor Propagation Delay Time (ns) loop and Max Tap Delay Electrical and Thermal Characteristics ...
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... Figure 10. DLL Locking Range Loop Delay Versus Frequency of Operation for DLL_Extend=1 4.5.2 Input AC Timing Specifications Table 10 provides the input AC timing specifications at recommended operating conditions (see with LV = 3.3 V ± 0 MPC8245 Integrated Processor Hardware Specifications, Rev Propagation Delay Time (ns) loop and Max Tap Delay ...
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... Additional analyses of trace lengths and SDRAM loading must be performed to optimize timing. os For details on trace measurements and the problem of T MPC8245/MPC8241 Memory Clock Design Guidelines. MPC8245 Integrated Processor Hardware Specifications, Rev. 10 Freescale Semiconductor Table 10. Input AC Timing Specifications Characteristic /2 of the rising edge of PCI_SYNC_IN to 0.4 × ...
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... DLL to accommodate for internal delay. This causes SDRAM_SYNC_IN to appear before sys_logic_clk once the DLL locks. Figure 11. Input/Output Timing Diagram Referenced to SDRAM_SYNC_IN PCI_SYNC_IN 10a PCI Inputs/Outputs Input Timing Figure 12. Input/Output Timing Diagram Referenced to PCI_SYNC_IN MPC8245 Integrated Processor Hardware Specifications, Rev 11a 2.0 V 2.0 V ...
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... All output timings assume a purely resistive 50-Ω load (see AC test load for the MPC8245). Output timings are measured at the pin; time-of-flight delays must be added for trace lengths, vias, and connectors in the system. These specifications are for the default driver ...
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... PCI bused signals are composed of the following signals: LOCK, IRDY, C/BE[3:0], PAR, TRDY, FRAME, STOP, DEVSEL, PERR, SERR, AD[31:0], REQ[4:0], GNT[4:0], IDSEL, and INTA meet minimum output hold specifications relative to PCI_SYNC_IN for both 33- and 66-MHz PCI systems, the MPC8245 has a programmable output hold delay for PCI signals (the PCI_SYNC_IN to output valid timing is also affected). The initial value of the output hold delay is determined by the values on the MCP and CKE reset configuration signals ...
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... Table 12 provides the DC electrical characteristics for the I At recommended operating conditions with OV Parameter Input high voltage level Input low voltage level Low-level output voltage MPC8245 Integrated Processor Hardware Specifications, Rev. 10 Freescale Semiconductor 13a2, 2.1 ns for 33-MHz PCI PCI_HOLD_DEL = 10 13a0 for 66-MHz PCI ...
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... DD DD Capacitance for each I/O pin Notes: 1. Output voltage (open drain or open collector) condition = 3 mA sink current. 2. Refer to the MPC8245 Integrated Processor Reference Manual for information on the digital filter used. 3. I/O pins obstruct the SDA and SCL lines if the OV 2 4.6 Electrical Specifications ...
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... For rise and fall times, the latter convention is used with the appropriate letter: R (rise (fall transmitter, the MPC8245 provides a delay time of at least 300 ns for the SDA signal (referred to as the Vihmin of the SCL signal) to bridge the undefined region of the falling edge of SCL to avoid unintended generation of Start or Stop condition. ...
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... S_INT inputs invalid (hold time) to S_CLK Notes: 1. See the MPC8245 Integrated Processor Reference Manual for a description of the PIC interrupt control register (ICR) and S_CLK frequency programming. 2. S_RST, S_FRAME, and S_INT shown in and do not describe functional relationships between S_RST, S_FRAME, and S_INT. The MPC8245 Integrated Processor Reference Manual describes the functional relationships between these signals. 3. The sys_logic_clk waveform is the clocking signal of the internal peripheral logic from the output of the peripheral logic PLL ...
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... Figure 19. PIC Serial Interrupt Mode Input Timing Diagram 4.8 IEEE 1149.1 (JTAG) AC Timing Specifications Table 15 provides the JTAG AC timing specifications for the MPC8245 while in the JTAG operating mode at recommended operating conditions (see of the system clock (PCI_SYNC_IN). Table 15. JTAG AC Timing Specification (Independent of PCI_SYNC_IN) ...
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... TCK 3 Figure 20. JTAG Clock Input Timing Diagram TCK TRST TCK Data Inputs Data Outputs Data Outputs Figure 22. JTAG Boundary Scan Timing Diagram MPC8245 Integrated Processor Hardware Specifications, Rev Midpoint Voltage 4 5 Figure 21. JTAG TRST Timing Diagram Input Data Valid ...
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... Figure 23. Test Access Port Timing Diagram 5 Package Description This section details package parameters, pin assignments, and dimensions. 5.1 Package Parameters The MPC8245 uses × 35 mm, cavity-up, 352-pin tape ball grid array (TBGA) package. The package parameters are as follows. Package Outline Interconnects Pitch Solder Balls ...
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... Package Description 5.2 Pin Assignments and Package Dimensions Figure 24 shows the top surface, side profile, and pinout of the MPC8245, 352 TBGA package. – F – CORNER ...
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... Pinout Listings Table 16 provides the pinout listing for the MPC8245, 352 TBGA package. Name Pin Numbers C/BE[3:0] P25 K23 F23 A25 DEVSEL H26 FRAME J24 IRDY K25 LOCK J26 AD[31:0] V25 U25 U26 U24 U23 T25 T26 R25 R26 N26 N25 N23 M26 M25 ...
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... AD1 SDCAS AD2 CKE H2 WE AA1 AS Y1 IRQ0/S_INT C19 IRQ1/S_CLK B21 IRQ2/S_RST AC22 IRQ3/S_FRAME AE24 IRQ4/L_INT A23 SDA AE20 SCL AF21 MPC8245 Integrated Processor Hardware Specifications, Rev Power Type Supply Output GV DD Output Output GV DD Output ...
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... H3 CKO/DA1 B15 OSC_IN AD21 HRST_CTRL A20 HRST_CPU A19 MCP A17 NMI D16 SMI A18 SRESET/SDMA12 B16 TBEN/SDMA13 B14 MPC8245 Integrated Processor Hardware Specifications, Rev. 10 Freescale Semiconductor Power Type Supply DUART Control Signals Output Output Clock-Out Signals Output ...
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... AD13 AD15 AD3 AD5 AD7 C10 C12 D13 AB24 AD20 AD24 C14 C20 C24 DD E24 G24 J23 K24 M24 P24 T23 Y24 MPC8245 Integrated Processor Hardware Specifications, Rev Power Type Supply Output OV DD ...
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... DA2 C25 DA3/PCI_CLK4 AF26 DA4/REQ4 Y26 DA5/GNT4 W26 DA[10:6]/ A22 B19 A21 B18 B17 PLL_CFG[0:4] DA[11] AD26 DA[12:13] AF17 AF19 MPC8245 Integrated Processor Hardware Specifications, Rev. 10 Freescale Semiconductor Power Type Supply Power for core V DD 1.8/2.0 V — — Power for PLL AV DD (CPU core logic) 1 ...
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... The 266- and 300-MHz part offerings can run at a source voltage of 1.8 ± 100 mV or 2.0 ± 100 mV. Source voltage should be 2.0 ± 100 mV for 333- and 350-MHz parts. 23. This pin is LAVDD on the MPC8240 the MPC8245, which should not pose a problem when an MPC8240 is replaced with an MPC8245. ...
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... F 01111 2,5 10 10000 30 –44 12 5,7 11 10001 25– 10010 60 –66 MPC8245 Integrated Processor Hardware Specifications, Rev. 10 Freescale Semiconductor 9 300-MHz Part Periph PCI Clock CPU Input Logic/ MemBus Clock (PCI_ Clock Range SYNC_IN) 1 Range (MHz) Range (MHz) (MHz) 5,7 75–105 188– ...
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... Rev 11110 33 –38 Rev D MPC8245 Integrated Processor Hardware Specifications, Rev 300-MHz Part Periph PCI Clock Logic/ CPU Input MemBus Clock (PCI_ Clock Range SYNC_IN) 1 Range (MHz) Range (MHz) (MHz) 2,7 Not available ...
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... Limited by the minimum CPU VCO frequency (360 MHz). 7. Limited by the maximum CPU VCO frequency (maximum marked CPU speed X 2 clock-off mode, no clocking occurs inside the MPC8245, regardless of the PCI_SYNC_IN input. 9. Range values are rounded down to the nearest whole number (decimal place accuracy removed). ...
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... MPC8245 Integrated Processor Hardware Specifications, Rev 333 MHz Part 350 MHz Part PCI Clock Periph CPU Input Logic/Mem Clock (PCI_ Bus Clock Range SYNC_IN) Range 1 (MHz) Range (MHz) (MHz) ...
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... Limited by the minimum CPU VCO frequency (360 MHz). 7. Limited by the maximum CPU VCO frequency (Maximum marked CPU speed X 2 clock-off mode, no clocking occurs inside the MPC8245, regardless of the PCI_SYNC_IN input. 9. Range values are rounded down to the nearest whole number (decimal place accuracy removed). ...
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... MPC8245 can generate transient power surges and high frequency noise in its power supply, especially while driving large capacitive loads. This noise must be prevented from reaching other components in the MPC8245 system, and the MPC8245 itself requires a clean, tightly regulated source of power. Therefore, place at least one decoupling capacitor at each V These decoupling capacitors should receive their power from dedicated power planes in the PCB, with short traces to minimize inductance. These capacitors should have a value of 0.1 µ ...
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... The SDRAM_SYNC_OUT signal routed halfway out to the SDRAM devices and then returned to the SDRAM_SYNC_IN input of the MPC8245. The trace length can be used to skew or adjust the timing window as needed. See the Tundra Tsi107™ Design Guide (AN1849) and Freescale application notes AN2164, MPC8245/MPC8241 Memory Clock Design Guidelines: Part 1 and AN2746, MPC8245/MPC8241 Memory Clock Design Guidelines: Part 2 for details ...
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... The MPC8245 PCI reference voltage (LV interfacing the MPC8245 into a 3.3-V PCI bus system. Similarly, the LV a 5.0 V ± 5% power supply if interfacing the MPC8245 into a 5-V PCI bus system. For either reference voltage, the MPC8245 always performs 3.3-V signaling as described in the PCI Local Bus Specification (Rev. 2.2). The MPC8245 tolerates 5-V signals when interfaced into a 5-V PCI bus system. ...
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... ROM functionality. In extended ROM mode, the TBEN, CHKSTOP_IN, SRESET, TRIG_IN, and TRIG_OUT functionalities are not available. The driver names and pin capability of the MPC8245 and the MPC8240 differ slightly. Refer to the drive capability table (for the ODCR register at 0x73) in the MPC8240 Integrated Processor Hardware ...
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... IC). Regardless of the numbering, the signal placement recommended in common to all known emulators. MPC8245 Integrated Processor Hardware Specifications, Rev allows the COP port to independently assert HRESET or TRST, Figure 26 ...
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... Physical Pin Out Note: 1 QACK is an output and is not required at the COP header for emulation. 2 RUN/STOP normally found on pin 5 of the COP header is not implemented on the MPC8245. Connect pin 5 of the COP header to OV with a 1-kΩ pull-up resistor CKSTP_OUT normally on pin 15 of the COP header is not implemented on the MPC8245. Connect pin 15 of the COP header to OV with a 10-kΩ ...
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... A heat sink (for example, ChipCoolers) is attached to the TBGA package, and there is high board-level thermal loading from adjacent components. • A heat sink (for example, ChipCoolers) is attached to the TBGA package, and there is low board-level thermal loading from adjacent components. MPC8245 Integrated Processor Hardware Specifications, Rev TBGA Package Heat Sink Heat Sink ...
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... Figure 28. Die Junction-to-Ambient Resistance The board designer can choose between several types of heat sinks to place on the MPC8245. Several commercially-available heat sinks for the MPC8245 are provided by the following vendors: Aavid Thermalloy 80 Commercial St. Concord, NH 03301 Internet: www.aavidthermalloy.com Alpha Novatech 473 Sapena Ct ...
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... The heat is then removed from the exposed surfaces of the board through convection and radiation heat sink is used, a larger percentage of heat leaves through the top side of the spreader. MPC8245 Integrated Processor Hardware Specifications, Rev Radiation ...
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... Several commercially-available thermal interfaces and adhesive materials are provided by the following vendors: Chomerics, Inc. 77 Dragon Ct. Woburn, MA 01888-4014 Internet: www.chomerics.com MPC8245 Integrated Processor Hardware Specifications, Rev. 10 Freescale Semiconductor Silicone Sheet (0.006 in.) Bare Joint Floroether Oil Sheet (0.007 in.) Graphite/Oil Sheet (0.005 in.) ...
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... R = junction-to-ambient thermal resistance (°C/W) θ junction-to-case thermal resistance (°C/W) θ case-to-ambient thermal resistance (°C/W) θCA MPC8245 Integrated Processor Hardware Specifications, Rev 800-248-2481 888-642-7674 800-347-4572 888-246-9050 , can be obtained from the equation Freescale Semiconductor ...
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... MIL-SPEC and EIA/JESD (JEDEC) specifications are available from Global Engineering Documents at 800-854-7179 or 303-397-7956. JEDEC specifications are available on the web at http://www.jedec.org. MPC8245 Integrated Processor Hardware Specifications, Rev. 10 Freescale Semiconductor . For instance, the user can change the size of the heat θCA ...
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... Section 4.3.1—Table 9: Corrected last row to state the correct description for the bit setting. Max tap delay, DLL extend. Figure 8: Corrected the label name for the DLL graph to state “DLL Locking Range Loop Delay vs. Frequency of Operation for DLL_Extend=1 and Normal Tap Delay” MPC8245 Integrated Processor Hardware Specifications, Rev Table 19. Revision History Table ...
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... Section 1.5.3—Updated Note 25 for QACK/DA0 signal. Added a sentence to Note 3. Section 1.6 —Incorporated Note 19 into Note 12 and modified Tables 18 and 19 accordingly. Section 1.9—Updated part marking nomenclature where appropriate to include the lead-free offering. Replaced reference to PNS document MPC8245RZUPNS with MPC8245ARZUPNS. 3 — Section 1.4.1.2—Figure 2: Updated Note 2 and removed ‘voltage regulator delay’ label since Section 1 ...
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... Section 1.7.9—Updated list for heat sink and thermal interface vendors. Section 1.9—Changed format of Ordering Information section. Added tables to reflect part number specifications also available. Added Sections 1.9.2 and 1.9.3. 0.5 — Corrected labels for Figures 5 through 8. MPC8245 Integrated Processor Hardware Specifications, Rev Substantive Change(s) and ...
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... Revision Date 0.4 — Section 1.2—Changed Features list (format) to match with the features list of the MPC8245 Integrated Processor Reference Manual. Section 1.4.1.2—Updated Table 2 to include 1.8 ± 100mV numbers. Section 1.4.3—Changed Table 7 to include new part offerings of 333 and 350 MHz. Added rows to include VCO frequency ranges for all parts for both memory VCO and CPU VCO. Section 1.4.1.5— ...
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... V. DD Changed Note 16 of Table value of 2.0 V for V Removed second sentence of the second paragraph in Section 1.7.2 because it referenced information about a 1.8-V design. Removed reference to 1 third sentence of Section 1.7.7. MPC8245 Integrated Processor Hardware Specifications, Rev Substantive Change(s) /AV / 2.0 ± 100 mV. ...
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... Section 1.3, Table 2, Table 5, Table 9, Table 17, and Section 1.7.2. Pin D17, formerly LAV supplied internally. Eliminated all references to LAV Previous Note 4 of Table 2 did not apply to the MPC8245 (MPC8240 document legacy). New Note 4 added in reference to maximum CPU speed at reduced V Updated the Programmable Output Impedance of DEV_MEM_ADDR in Table Ω to reflect characterization data ...
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... Part Numbers Fully Addressed by This Document Table 20 provides the Freescale part numbering nomenclature for the MPC8245. Note that the individual part numbers correspond to a maximum processor core frequency. For available frequencies, contact a local Freescale sales office. In addition to the processor frequency, the part numbering scheme also includes an application modifier that may specify special application conditions ...
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... Parts with application modifiers or revision levels not fully addressed in this specification document are described in separate part number specifications that supplement and supersede this document. shows the part numbers addressed by the MPC8245TXXnnnx series. The revision level can be determined by reading the Revision ID register at address offset 0x08. ...
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... Ordering Information 9.3 Part Marking Parts are marked as the example shown in MPC8245 Integrated Processor Hardware Specifications, Rev Figure 31. MPC8245LXXnnnx ATWLYYWW CCCCC MMMMM YWWLAZ Notes : MMMMM is the 5-digit mask number. ATWLYYWW is test traceability code. YWWLAZ is the assembly traceability code. CCCCC is the country code. ...
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... THIS PAGE INTENTIONALLY LEFT BLANK MPC8245 Integrated Processor Hardware Specifications, Rev. 10 Freescale Semiconductor Ordering Information 65 ...
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... Ordering Information THIS PAGE INTENTIONALLY LEFT BLANK MPC8245 Integrated Processor Hardware Specifications, Rev Freescale Semiconductor ...
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... THIS PAGE INTENTIONALLY LEFT BLANK MPC8245 Integrated Processor Hardware Specifications, Rev. 10 Freescale Semiconductor Ordering Information 67 ...
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... Denver, Colorado 80217 +1-800 441-2447 or +1-303-675-2140 Fax: +1-303-675-2150 LDCForFreescaleSemiconductor @hibbertgroup.com Document Number: MPC8245EC Rev. 10 08/2007 Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document ...