MX26L6420MC-90 Macronix International Co., MX26L6420MC-90 Datasheet
MX26L6420MC-90
Available stocks
Related parts for MX26L6420MC-90
MX26L6420MC-90 Summary of contents
Page 1
FEATURES • 4,194,304 x 16 byte structure • Single Power Supply Operation - 2.7 to 3.6 volt for read, erase, and program operations • Low Vcc write inhibit is equal to or less than 2.5V • Compatible with JEDEC standard ...
Page 2
PIN CONFIGURATION 48 CSP Ball pitch=0.75mm for MX26L6420XA (TOP view, Ball down) 1 A13 A A14 B A15 C A16 I/O F GND 63 CSP Ball pitch=0.8mm for MX26L6420XB(TOP view, Ball down ...
Page 3
SOP 44 A20 A21 2 43 A19 A18 A17 A10 A11 A12 A13 A14 A15 ...
Page 4
BLOCK DIAGRAM CONTROL CE INPUT OE LOGIC WE ADDRESS LATCH A0-A21 AND BUFFER Q0-Q15 P/N:PM0823 MX26L6420 PROGRAM/ERASE HIGH VOLTAGE MX26L6420 FLASH ARRAY ARRAY SOURCE HV Y-PASS GATE PGM SENSE DATA AMPLIFIER HV PROGRAM DATA LATCH I/O BUFFER 4 WRITE STATE ...
Page 5
AUTOMATIC PROGRAMMING The MX26L6420 is word programmable using the Auto- matic Programming algorithm. The Automatic Program- ming algorithm makes the external system do not need to have time out sequence nor to verify the data pro- grammed. The typical chip ...
Page 6
Table 1 BUS OPERATION(1) Operation CE Read L Write(Note 1) L Standby VCC±0.3V Output Disable L Reset X Legend: L=Logic LOW=V ,H=Logic High Notes: 1. When the ACC pin the device enters the accelerated ...
Page 7
REQUIREMENTS FOR READING ARRAY DATA To read array data from the outputs, the system must drive the CE and OE pins to VIL the power control and selects the device the output control and gates array ...
Page 8
RESET OPERATION The RESET pin provides a hardware method of resetting the device to reading array data. When the RESET pin is driven low for at least a period of tRP, the device immediately terminates any operation in progress, tristates ...
Page 9
Indicator Bit permanently set to a "0". Therefore, the Secured Silicon Sector Indi- cator Bit permanently set to a "0". Therefore, the Second Silicon Sector Indicator Bit prevents customer, lockable device from being used to ...
Page 10
SOFTWARE COMMAND DEFINTIONS Device operations are selected by writing specific ad- dress and data sequences into the command register. Writing incorrect address and data values or writing them in the improper sequence will reset the device to the read mode. ...
Page 11
READING ARRAY DATA The device is automatically set to reading array data after device power-up. No commands are required to retrieve data. The device is also ready to read array data after completing an Automatic Program or Automatic Erase algorithm. ...
Page 12
ACCELERATED PROGRAM OPERATIONS The device offers accelerated program operations through the ACC pin. When the system asserts V pin, the device automatically bypass the two "Unlock" write cycle. The device uses the higher voltage on the ACC pin to accelerate ...
Page 13
WRITE OPERSTION STATUS The device provides several bits to determine the sta- tus of a write operation: Q5, Q6, Q7. Table 10 and the following subsections describe the functions of these bits. Q7, and Q6 each offer a method for ...
Page 14
Q7: Data Polling The Data Polling bit, Q7, indicates to the host sys-tem whether an Automatic Algorithm is in progress or com- pleted. Data Polling is valid after the rising edge of the final WE pulse in the program or ...
Page 15
ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . ..... -65 Ambient Temperature with Power Applied .... ...
Page 16
DC CHARACTERISTICS TA=0° ° ° ° ° 70° ° ° ° ° C, VCC=2.7V~3.6V Para- meter Description I LI Input Load Current (Note 1) I LIT A9 Input Load Current I LO Output Leakage Current ICC1 VCC Active ...
Page 17
SWITCHING TEST CIRCUITS DEVICE UNDER TEST CL 6.2K ohm KEY TO SWITCHING WAVEFORMS WAVEFROM INPUTS Don't Care, Any Change Permitted Does Not Apply SWITCHING TEST WAVEFORMS 3.0V 0.0V P/N:PM0823 TEST SPECIFICATIONS Test Condition Output Load 2.7K ohm Output Load Capacitance, ...
Page 18
AC CHARACTERISTICS TA=0° ° ° ° ° 70° ° ° ° ° C, VCC=2.7V~3.6V Symbol DESCRIPTION tACC Address to output delay OE=VIL tCE Chip enable to output delay tOE Output enable to output delay tDF OE High to ...
Page 19
Fig 1. COMMAND WRITE OPERATION VCC 5V VIH Addresses VIL tAS VIH WE VIL tOES CE VIH VIL tCS OE VIH VIL VIH Data VIL READ/RESET OPERATION Fig 2. READ TIMING WAVEFORMS VIH Addresses VIL VIH CE VIL VIH WE ...
Page 20
AC CHARACTERISTICS TA=0° ° ° ° ° 70° ° ° ° ° C, VCC=2.7V~3.6V Parameter Description tREADY RESET PIN Low (NOT During Automatic Algorithms) to Read or Write (See Note) tRP1 RESET Pulse Width (During Automatic Algorithms) tRP2 ...
Page 21
ERASE/PROGRAM OPERATION Fig 4. AUTOMATIC CHIP ERASE TIMING WAVEFORM Erase Command Sequence(last two cycle) tWC 2AAh Address CE tGHWL OE WE tCS Data tVCS VCC P/N:PM0823 Read Status Data tAS 555h tAH tCH tWHGL tWP tWPH tDS tDH 55h 10h ...
Page 22
Fig 5. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART P/N:PM0823 START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 10H Address 555H Data ...
Page 23
Fig 6. AUTOMATIC PROGRAM TIMING WAVEFORMS Program Command Sequence(last two cycle) tWC 555h Address CE tGHWL OE WE tCS Data tVCS VCC NOTES: 1.PA=Program Address, PD=Program Data, DOUT is the true data the program address Fig 7. Accelerated Program Timing ...
Page 24
Fig 8. CE CONTROLLED PROGRAM TIMING WAVEFORM 555 for program 2AA for erase Address tWC tWH WE tGHEL OE tCP CE tWS tDS Data tRH RESET NOTES: 1.PA=Program Address, PD=Program Data, DOUT=Data Out, DQ7=complement of data written to device. 2.Figure ...
Page 25
Fig 9. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART Increment Address P/N:PM0823 MX26L6420 START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data A0H Address 555H Write Program Data/Address Data Poll from system No Verify Word Ok ? YES No ...
Page 26
Fig 10. SECURED SILICON SECTOR PROTECTED ALOGORITHMS FLOWCHART Device Failed P/N:PM0823 MX26L6420 START Enter Secured Silicon Sector Wait 1us Frist Wait Cycle Data=60h Second Wait Cycle Data=60h A6=0, A1=1, A0=0 Wait 300us NO Data=01h? YES Write Reset Command Secured Sector ...
Page 27
Fig 11. SILICON ID READ TIMING WAVEFORM VCC 3V VID ADD VIH A9 VIL VIH ADD A0 VIL tACC A1 VIH VIL VIH ADD VIL CE VIH VIL VIH WE VIL VIH OE VIL VIH DATA VIL Q0-Q15 P/N:PM0823 tACC ...
Page 28
WRITE OPERATION STATUS Fig 12. DATA POLLING TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS) tRC Address VA tACC tCE CE tCH tOE OE tOEH WE Q7 Q0-Q6 NOTES: VA=Valid address. Figure shows are first status cycle after command sequence, last status read ...
Page 29
Fig 13. Data Polling Algorithm No Notes: 1.VA=valid address for programming. 2.Q7 should be rechecked even Q5="1"because Q7 may change simultaneously with Q5. P/N:PM0823 MX26L6420 START Read Q7~Q0 Add (1) Yes Q7 = Data ? ...
Page 30
Fig 14. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALOGRITHMS) tRC Address VA tACC tCE CE tCH tOE OE tOEH WE High Z Q6 NOTES: VA=Valid address; not required for Q6. Figure shows first two status cycle after command sequence, last ...
Page 31
Fig 15. Toggle Bit Algorithm NO Complete, Write Reset Command Note: 1.Read toggle bit twice to determine whether or not it is toggling. 2.Recheck toggle bit because it may stop toggling as Q5 changes to "1". P/N:PM0823 START Read Q7~Q0 ...
Page 32
ERASE AND PROGRAMMING PERFORMANCE(1) PARAMETER Chip Erase Time Word Programming Time Chip Programming Time Accelerated Word Program Time Erase/Program Cycles Note: 1.Not 100% Tested, Excludes external system level over head. 2.Typical values measured at 25° C,3.3V. Additionally programming typicals assume ...
Page 33
... ORDERING INFORMATION PLASTIC PACKAGE PART NO. ACCESS TIME (ns) MX26L6420MC-90 90 MX26L6420MC-12 120 MX26L6420TC-90 90 MX26L6420TC-12 120 MX26L6420XAC-90 90 MX26L6420XAC-12 120 MX26L6420XBC-90 90 MX26L6420XBC-12 120 MX26L6420MI-90 90 MX26L6420MI-12 120 MX26L6420TI-90 90 MX26L6420TI-12 120 MX26L6420XAI-90 90 MX26L6420XAI-12 120 MX26L6420XBI-90 90 MX26L6420XBI-12 120 P/N:PM0823 Temperature Package type Range Commerical 44 pin SOP Commerical 44 pin SOP ...
Page 34
PACKAGE INFORMATION 44-PIN SOP P/N:PM0823 MX26L6420 34 REV. 0.5, JAN. 29, 2002 ...
Page 35
PLASTIC TSOP P/N:PM0823 MX26L6420 35 REV. 0.5, JAN. 29, 2002 ...
Page 36
CSP P/N:PM0823 MX26L6420 36 REV. 0.5, JAN. 29, 2002 ...
Page 37
CSP P/N:PM0823 MX26L6420 37 REV. 0.5, JAN. 29, 2002 ...
Page 38
REVISION HISTORY Revision No. Description 0.1 1.To added the VI/O voltage range and performance 2.To modify Autoselect code table 3.To added Deep power-down mode 4.To added chip erase algorithm flowchart 5.To added secured silicon sector protect Algorithm flowchart 6.To added ...
Page 39
... TEL:+65-348-8385 FAX:+65-348-8096 TAIPEI OFFICE: TEL:+886-2-2509-3300 FAX:+886-2-2509-2200 ACRONIX MERICA, NC. TEL:+1-408-453-8088 FAX:+1-408-453-8488 CHICAGO OFFICE: TEL:+1-847-963-1900 FAX:+1-847-963-1909 http : //www.macronix.com C L O., TD. MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. MX26L6420 ...