MC100LVE222 Motorola, MC100LVE222 Datasheet

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MC100LVE222

Manufacturer Part Number
MC100LVE222
Description
Low-voltage 1:15 differential ECL/PECL clock driver
Manufacturer
Motorola
Datasheet

Specifications of MC100LVE222

Case
QFP

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Low Voltage 1:15 Differential
ECL fanout buffer designed with clock distribution in mind. The device
features fully differential clock paths to minimize both device and system
skew. The LVE222 can be used as a simple fanout buffer or outputs can
be configured to provide half frequency outputs. The combination of 1x
and 1/2x frequencies is flexible providing for a myriad of combinations. All
timing differences between the 1x and 1/2x signals are compensated for
internal to the chip so that the output–to–output skew is identical
regardless of what output frequencies are selected.
a result, changing these inputs could cause indeterminent excursions on
the outputs immediately following the changes on the inputs.
voltage is supplied. For single–ended input applications the V BB
reference should be connected to the CLK input and bypassed to ground
via a 0.01 f capacitor. The input signal is then driven into the CLK input.
50 , even if only one side is being used. In most applications all fifteen differential pairs will be used and therefore terminated. In
the case where fewer than fifteen pairs are used it is necessary to terminate at least the output pairs adjacent to the output pair
being used in order to maintain minimum skew. Failure to follow this guideline will result in small degradations of propagation
delay (on the order of 10–20ps) of the outputs being used, while not catastrophic to most designs this will result in an increase in
skew. Note that the package corners isolate outputs from one another such that the guideline expressed above holds only for
outputs on the same side of the package.
LVE222 to be used for high performance clock distribution in +3.3V systems. Designers can take advantage of the LVE222’s
performance to distribute low skew clocks across the backplane or the board. In a PECL environment series or Thevenin line,
terminations are typically used as they require no additional power supplies, if parallel termination is desired a terminating voltage
of V CC –2.0V will need to be provided. For more information on using PECL, designers should refer to Motorola Application Note
AN1406/D.
performance and minimizes board space requirements. The LVE222 will operate from a standard 100E –4.5V supply or a 5.0V
PECL supply. The 52–lead TQFP utilizes a 10x10mm body with a lead pitch of 0.65mm.
10/96
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Motorola, Inc. 1996
1/ 2 ECL/PECL Clock Driver
Fifteen Differential Outputs
200ps Part–to–Part Skew
50ps Output–to–Output Skew
Selectable 1x or 1/2x Frequency Outputs
Extended Power Supply Range of –3.0V to –5.25V (+3.0V to +5.25V)
52–Lead TQFP Packaging
ESD > 2000V
The MC100LVE222 is a low voltage, low skew 1:15 differential 1/ 2
The fsel and CLK_Sel input pins are asynchronous control signals. As
For applications which require a single–ended input, the V BB reference
To ensure that the tight skew specification is met it is necessary that both sides of the differential output are terminated into
The MC100LVE222, as with most ECL devices, can be operated from a positive V CC supply in PECL mode. This allows the
The MC100LVE222 is packaged in the 52–lead TQFP package. For a 3.3V supply this package provides the optimum
4–1
REV 1
ECL/PECL CLOCK DRIVER
1:15 DIFFERENTIAL 1/ 2
MC100LVE222
LOW VOLTAGE
TQFP PACKAGE
CASE 848D–03
FA SUFFIX

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MC100LVE222 Summary of contents

Page 1

... Note that the package corners isolate outputs from one another such that the guideline expressed above holds only for outputs on the same side of the package. The MC100LVE222, as with most ECL devices, can be operated from a positive V CC supply in PECL mode. This allows the LVE222 to be used for high performance clock distribution in +3.3V systems. Designers can take advantage of the LVE222’s performance to distribute low skew clocks across the backplane or the board ...

Page 2

... VCCO 1 2 LOGIC SYMBOL MR CLK0 1 CLK0 CLK1 2 CLK1 CLK_Sel V BB fsela fselb fselc fseld MOTOROLA Pinout: 52–Lead TQFP (Top View MC100LVE222 Qa0:1 Qa0:1 3 Qb0:2 Qb0:2 4 Qc0:3 Qc0:3 6 Qd0:5 Qd0:5 4– Qd0 25 ...

Page 3

... MC100LVE222 Typ Max Min Typ Max Unit –0.955 –0.880 –1.025 –0.955 –0.880 V –1.705 –1.620 –1.810 –1.705 –1.620 V –0.880 – ...

Page 4

... MC100LVE222 ECL AC CHARACTERISTICS ( (min (max CCO = GND) –40 C Symbol Characteristic Min t PLH Propagation Delay to Output t PHL IN (differential) 1040 IN (single–ended) 990 MR 1100 1250 t skew Within–Device Skew Part–to–Part Skew (Diff Minimum Input Swing 400 ...

Page 5

... NOTES: 0.10 (0.004) T VIEW 0.25 (0.010) GAGE PLANE 4–5 MC100LVE222 –X– X= VIEW Y BASE METAL F É É É É Ç Ç Ç Ç Ç Ç Ç Ç É É É É D 0.13 (0.005 L– ...

Page 6

... JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 *MC100LVE222/D* 4–6 ECLinPS and ECLinPS Lite MC100LVE222/D DL140 — Rev 3 ...

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