CY7C43682AV-10AC Cypress Semiconductor Corporation., CY7C43682AV-10AC Datasheet
CY7C43682AV-10AC
Related parts for CY7C43682AV-10AC
CY7C43682AV-10AC Summary of contents
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... Features • 3.3V high-speed, low-power, bidirectional, First-In First-Out (FIFO) memories • 1K ×36 ×2 (CY7C43642AV) • 4K x36 x2 (CY7C43662AV) • 16K x36 x2 (CY7C43682AV) • 0.25-micron CMOS for optimum speed/power • High-speed 133-MHz operation (7.5-ns Read/Write cycle times) Logic Block Diagram CLKA CSA Port A W/RA Control Logic ...
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... GND GND CY7C43642/ 62/82AV –15 Unit 66.7 MHz CY7C43682AV 16K × 36 ×2 120 TQFP Page [+] Feedback ...
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... FIFO2 is less than or equal to the value in the Almost Full B offset [1] register, Y2. During Master Reset. A HIGH on FWFT selects CY Standard mode, a LOW selects First -Word Fall-Through mode. Once the timing mode has been selected, the level on FWFT/STAN must be static throughout device operation. CY7C43642AV CY7C43662AV CY7C43682AV [1] Page [+] Feedback ...
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... FIFO1. Four LOW-to-HIGH transitions of CLKA and four LOW-to-HIGH transitions of CLKB must occur while MRST1 is LOW. CY7C43642AV CY7C43662AV CY7C43682AV outputs available 0–35 outputs available 0–35 Page ...
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... LOW-to-HIGH transition of CLKA. The A 0–35 when W/RA is HIGH. A LOW selects a Write operation and a HIGH selects a Read operation on Port B for a LOW-to-HIGH transition of CLKB. The B 0–35 when W/RB is LOW. CY7C43642AV CY7C43662AV CY7C43682AV outputs are in the high-impedance state outputs are in the high-impedance state Page [+] Feedback ...
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... The highest numbered input is used as the most significant bit of the binary number in each case. Valid programming values for the registers range from 0 to 1023 for the CY7C43642AV 4095 for the CY7C43662AV 16383 for the [1] CY7C43682AV. After all the offset ...
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... Y1 for AFA and or greater register Y2 for AFB. These registers are loaded with preset SKEW1 values during a FIFO reset, programmed from Port A, or CY7C43642AV CY7C43662AV CY7C43682AV or greater after the SKEW1 [1] or greater after SKEW2 Page [+] Feedback ...
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... X Programming via Port A CLKA A 0– high-impedance state X In high-impedance state In high-impedance state In high-impedance state X Active, FIFO2 output register CY7C43642AV CY7C43662AV CY7C43682AV af- RTR [3] X2 and Y2 Registers Programming via Port A Port Function None None FIFO1 Write Mail1 Write ...
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... EFA/ORA ( [16384 – H (Y2 + 1)] H 16383 16384 H CY7C43642AV CY7C43662AV CY7C43682AV FIFO2 Read None Mail2 Read (set MBF2 HIGH) Port Function None None FIFO2 Write Mail2 Write None FIFO1 Read None Mail1 Read (set MBF1 HIGH) Synchronized to CLKA ...
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... Max < V < Commercial Industrial Commercial Industrial Test Conditions ° MHz 3.3V CC CY7C43642AV CY7C43662AV CY7C43682AV [13 ° 0°C to +70 C 3.3V ± 10% ° ° +85 C 3.3V ± 10% CY7C43642/62/82AV Min. Max. Unit 2.4 V 0 –0.5 0.8 V –10 ...
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... ALL INPUT PULSES 3.0V 10% GND 3 ns CY7C43642/ 62/82AV –7 Min. Max. 7.5 3.5 3.5 before 3 0– after CLKB 0 0– CY7C43642AV CY7C43662AV CY7C43682AV 90% 90% 10 90% 90% 10 CY7C43642/ CY7C43642/ 62/82AV 62/82AV –10 –15 Min. Max. Min. Max. Unit 133 100 67 MHz ...
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... Active and CSB 1 0–35 Active 0– 0–35 0–35 90 outputs are active and MBB is HIGH. 0–35 outputs are active and MBA is HIGH. 0–35 CY7C43642AV CY7C43662AV CY7C43682AV CY7C43642/ CY7C43642/ 62/82AV 62/82AV –10 –15 Max. Min. Max. Min. Max. Unit ...
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... RSF RSF t WFF t t ENH ENS AEB Offset (X1) AFA Offset (Y1) AFB Offset (Y2) , then FFB/IRB may transition HIGH one cycle later than shown. SKEW1 CY7C43642AV CY7C43662AV CY7C43682AV t FWS t WFF [24] t SKEW1 AEA Offset (X2) First Word to FIFO1 t WFF Page [+] Feedback ...
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... ENH ENS [25] [25 ENS ENH t t ENS ENH t t ENS ENH ENH ENS ENH ENS [27] [27 ENS DIS ENS CY7C43642AV CY7C43662AV CY7C43682AV t t ENS ENH t t ENS ENH Page [+] Feedback ...
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... CLKL ENS ENH ENS ENH [30] Previous Data [30] W2 [30 ENS DIS ENS CY7C43642AV CY7C43662AV CY7C43682AV t t ENS Operation A DIS [28 DIS A [28 ENS ENH t No Operation A DIS [30 DIS [30] ...
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... CLKB cycle later than shown. Document #: 38-06020 Rev CLK t t CLKH CLKL [31 CLKH CLKL t t REF CLK t A CY7C43642AV CY7C43662AV CY7C43682AV t REF t t ENS ENH W1 , then the transition of ORB HIGH and load SKEW1 Page [+] Feedback ...
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... CLKA edge and rising CLKB edge is less than t Document #: 38-06020 Rev CLK t t CLKH CLKL t [32] t CLKH CLKL REF REF CLK t t ENS ENH then the transition of EFB HIGH may occur one CLKB cycle later than shown. SKEW1 CY7C43642AV CY7C43662AV CY7C43682AV [32] W1 Page [+] Feedback ...
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... CLKA cycle later than shown. Document #: 38-06020 Rev CLK t t CLKH CLKL t t CLKH CLKL t t REF CLK t ENS t A CY7C43642AV CY7C43662AV CY7C43682AV [33] t REF t ENH W1 , then the transition of ORA HIGH and load SKEW1 Page [+] Feedback ...
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... CLKB edge and rising CLKA edge is less than t Document #: 38-06020 Rev CLK t t CLKH CLKL t t [35] CLKH CLKL t t REF t REF CLK t t ENS ENH then the transition of EFA HIGH may occur one CLKA cycle later than shown. SKEW1 CY7C43642AV CY7C43662AV CY7C43682AV W1 Page [+] Feedback ...
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... Document #: 38-06020 Rev. *C Next Word From FIFO1 t t [36] CLKH CLKL t t WFF t WFF CLK t t ENS ENH t t ENS ENH FIFO1 , then IRA may transition HIGH one CLKA cycle later than shown. SKEW1 CY7C43642AV CY7C43662AV CY7C43682AV Page [+] Feedback ...
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... Document #: 38-06020 Rev. *C Next Word From FIFO1 [37 CLKH CLKL t t WFF WFF t CLK t t ENS ENH t t ENS ENH then the transition of FFA HIGH may occur one CLKA cycle later than shown. SKEW1 CY7C43642AV CY7C43662AV CY7C43682AV Page [+] Feedback ...
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... Document #: 38-06020 Rev. *C Next Word From FIFO2 t t [38] CLKH CLKL t t WFF t WFF CLK t t ENH ENS t t ENS ENH FIFO2 , then the transition of IRB HIGH may occur one CLKB cycle later than shown. SKEW1 CY7C43642AV CY7C43662AV CY7C43682AV Page [+] Feedback ...
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... Document #: 38-06020 Rev. *C Next Word From FIFO2 t t [39] CLKH CLKL t t WFF WFF t CLK t t ENS ENH t t ENS ENH FIFO2 , then the transition of FFB HIGH may occur one CLKB cycle later than shown. SKEW1 CY7C43642AV CY7C43662AV CY7C43682AV Page [+] Feedback ...
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... PAE ( Words in FIFO2 t ENS , then AEB may transition HIGH one CLKB cycle later than shown. SKEW2 , then AEA may transition HIGH one CLKA cycle later than shown. SKEW2 CY7C43642AV CY7C43662AV CY7C43682AV [1, 40, 41] X1 Words in FIFO t PAE t t ENH ENS t ENH ...
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... FIFO1 Port A Write (CSA = LOW, W/RA = HIGH, MBA = LOW), FIFO1 Port B Read (CSB = LOW, W/RB = HIGH, MBB = LOW). Data in the FIFO1 output register has been Read from the FIFO. 45 Maximum FIFO Depth = 1K for the CY7C43642AV, 4K for the CY7C43662AV, and 16K for the CY7C43682AV. 46 the minimum time between a rising CLKA edge and a rising CLKB edge for AFA to transition HIGH in the next CLKA cycle ...
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... CLKB MBF1 CSB [29] W/RB MBB ENB FIFO1 Output Register Document #: 38-06020 Rev ENH t ENS t ENH t ENH t ENH PMF MDV PMR W1 (Remains valid in Mail1 Register after Read) CY7C43642AV CY7C43662AV CY7C43682AV t PMF t ENH ENS t DIS Page [+] Feedback ...
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... Document #: 38-06020 Rev ENH t ENH t ENH t ENH PMF t ENS t t MDV PMR W1 (Remains valid in Mail2 Register after Read) after the RT1 rising edge. RTR to update these flags. RTR CY7C43642AV CY7C43662AV CY7C43682AV t PMF t ENH t DIS t RSTH t RTR . RTR Page [+] Feedback ...
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... Ordering Code 7 CY7C43662AV-7AC 10 CY7C43662AV-10AC 15 CY7C43662AV-15AC 3.3V 16K ×36 ×2 Bidirectional Synchronous FIFO Speed (ns) Ordering Code 7 CY7C43682AV-7AC 10 CY7C43682AV-10AC 15 CY7C43682AV-15AC 10 CY7C43682AV-10AI Document #: 38-06020 Rev. *C Package Name Package Type A120 120-lead Thin Quad Flat Package A120 120-lead Thin Quad Flat Package A120 120-lead Thin Quad Flat Package ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY7C43642AV CY7C43662AV CY7C43682AV 51-85100 Page [+] Feedback ...
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... Document Title: CY7C43642AV, CY7C43662AV, CY7C43682AV 3.3V 1K/4K/16K ×36 ×2 Bidirectional Synchronous FIFO Document Number: 38-06020 REV. ECN NO. Issue Date ** 107503 05/24/01 *A 109945 02/06/02 *B 117211 08/26/02 *C 122272 12/26/02 Document #: 38-06020 Rev. *C Orig. of Change Description of Change KTM Change from Spec #: 38-00775 to 38-06020 FSG Preliminary to final OOR Added footnote to retransmit timing ...