S3031B AMCC (Applied Micro Circuits Corp), S3031B Datasheet
S3031B
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DEVICE SPECIFICATION SONET/SDH/ATM OC-3/12 TRANSCEIVER W/CDR BiCMOS LVPECL CLOCK GENERATOR SONET/SDH/ATM OC-3/12 TRANSCEIVER W/CDR SONET/SDH/ATM OC-12 TRANSMITTER AND RECEIVER FEATURES • Complies with Bellcore and ITU-T specifications • On-chip high-frequency PLLs for clock generation and clock recovery • Supports 155.52 ...
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S3032 SONET OVERVIEW Synchronous Optical Network (SONET stan- dard for connecting one fiber system to another at the optical level. SONET, together with the Synchro- nous Digital Hierarchy (SDH) administered by the ITU-T, forms a single international standard ...
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SONET/SDH/ATM OC-3/12 TRANSCEIVER W/CDR Figure 4. S3032 Transceiver Functional Block Diagram Transmitter 8 PIN[7:0] 8:1 PARALLEL- TO-SERIAL PICLK TIMING GEN LLEB SLPTIME TESTEN CLOCK SYNTHESIZER RSTB CAP1 CAP2 MODE 0 MODE 1 REFCLKP/N TTLREF Receiver SDPECL 1:8 SERIAL- TO-PARALLEL OOF ...
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S3032 S3032 TRANSCEIVER FUNCTIONAL DESCRIPTION TRANSMITTER OPERATION The S3032 transceiver chip performs the serializing stage in the processing of a transmit SONET STS-3 or STS-12 bit serial data stream. It converts the 8-bit parallel 19.44 or 77.76 Mbps data stream ...
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SONET/SDH/ATM OC-3/12 TRANSCEIVER W/CDR RECEIVER OPERATION The S3032 transceiver chip provides the first stage of digital processing of a receive SONET STS-3 or STS-12 bit-serial stream. It converts the bit-serial 155.52 or 622.08 Mbit/sec data stream into a 19.44 or ...
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S3032 Frame and Byte Boundary Detection The frame and byte boundary detection circuitry searches the incoming data for three consecutive A1 bytes followed immediately by three consecutive A2 bytes. Framing pattern detection is enabled and dis- abled by the out-of-frame ...
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SONET/SDH/ATM OC-3/12 TRANSCEIVER W/CDR OTHER OPERATING MODES Diagnostic Loopback When the Diagnostic Loopback Enable (DLEB) input is active, a loopback from the transmitter to the re- ceiver at the serial data rate can be set up for diagnostic purposes. The ...
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S3032 Table 4. S3032 Transmitter Pin Assignment and Descriptions (Active High unless otherwise stated ...
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SONET/SDH/ATM OC-3/12 TRANSCEIVER W/CDR Table 5. S3032 Receiver Pin Assignment and Descriptions (Active High unless otherwise stated ...
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S3032 Table 6. S3032 Common Pin Assignment and Descriptions (Active High unless otherwise stated ...
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SONET/SDH/ATM OC-3/12 TRANSCEIVER W/CDR Table 7. S3032 Power and Ground Pin Assignments ...
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S3032 Figure 6. 64 PQFP Package Thermal Management SONET/SDH/ATM OC-3/12 TRANSCEIVER W/CDR ˚ ...
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SONET/SDH/ATM OC-3/12 TRANSCEIVER W/CDR Figure 7. Pinout Assignments PCLKGND TXCOREGND TXCOREVCC TTLREF REFCLKN REFCLKP AVCC1 AGND1 CAP2 CAP1 AGND0 AVCC0 LLEB TXOUTVCC TSDP TSDN April 18, 2000 / Revision S3032 Pinout 7 8 ...
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S3032 Table 8. Performance Specifications ...
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SONET/SDH/ATM OC-3/12 TRANSCEIVER W/CDR Table 9. Absolute Maximum Ratings ...
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S3032 Table 11. LVTTL Input/Output DC Characteristics – ...
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SONET/SDH/ATM OC-3/12 TRANSCEIVER W/CDR Table 12. LVPECL Input/Output DC Characteristics ...
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S3032 Table 13. Transmitter AC Timing Characteristics ...
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SONET/SDH/ATM OC-3/12 TRANSCEIVER W/CDR Figure 8. Transmitter Output Timing TSCLKP TSD Figure 9. PIN AC Input Timing PCLK PICLK PIN[7:0] 1. When a setup time is specified on LVTTL signals between an input and a clock, the setup time is ...
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S3032 RECEIVER FRAMING Figure 11 shows a typical reframe sequence in which a byte realignment is made. The frame and byte boundary detection is enabled by the rising edge of OOF and remains enabled while OOF is High. Both boundaries ...
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APPLICATION NOTE SONET/SDH/ATM OC-3/12 TRANSCEIVER W/CDR S3032 WITH DATA CLOCK SYNCHRONOUS TO REFERENCE CLOCK In some applications it is necessary to "forward clock" the data in a SONET/SDH system. In this ap- plication the reference clock from which the High ...
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S3032 Ordering Information – Applied Micro Circuits Corporation • 6290 Sequence Dr., San Diego, CA 92121 Phone: (858) ...