LC72723 Sanyo Semiconductor Corporation, LC72723 Datasheet
LC72723
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LC72723 Summary of contents
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... Ordering number : EN6037 Overview The LC72723 is an RDS (Radio Data System) signal demodulation IC. This IC integrates a bandpass filter, the demodulation circuit, and buffer RAM on a single chip and can read out RDS data in slave mode operation with the provision of an external clock input. It also supports ...
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... Pin Assignment (DIP16/MFP16) Block Diagram LC72723, LC72723M No. 6037-2/8 ...
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... RDS clock output (master mode) 15 RDCL RDS clock input (slave mode) 16 RDS-ID/READY RDS ID/ready output (Active low) 11 Vddd Digital system power supply (+ Vssd Digital system ground LC72723, LC72723M Function I/O Pin circuit type Output Input Output Input — — — — Output ...
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... Output voltage Input amplitude Guaranteed oscillator operating range Crystal oscillator frequency deviation RDCL setup time RDCL high-level time RDCL low-level time Data output time READY output time READY low-level time LC72723, LC72723M Symbol Conditions V max Vddd, Vdda * max TEST, MODE, RST ...
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... The RDS-ID and demodulation circuits are cleared, and (in slave mode) the READY state and memory are cleared. Master mode RDS-ID output (active low) Slave mode Readout data ready output (active low) Note: The RDS-ID (READY) pin is an n-channel open-drain output, and data is read out by connecting a pull-up resistor. LC72723, LC72723M Symbol Conditions Rmpxin MPXIN-Vssa KHz ...
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... When the above timing conditions are met, RDDA can be read at either the rise or fall of the RDCL signal. 4. After the last data from memory has been read, READY will be high once the period t of data has been written to memory, READY will be low and the application will be able to read that data. LC72723, LC72723M Symbol Conditions ...
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... A in the figure), immediately read out one bit of data and input the RDCL clock. Then, at the point READY goes high, the microcontroller must terminate RDCL output and then set MODE low. The application must switch MODE to low within 840 µs (tms) after READY goes low (timing A in the figure). RDCL (microcontroller status) RDCL (IC status) LC72723, LC72723M No. 6037-7/8 ...
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... LC72723 Sample Application Connection Circuit (for slave mode operation) Caution: If the RST pin is unused, it must be connected to ground. Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer’ ...