TC90A80N TOSHIBA Semiconductor CORPORATION, TC90A80N Datasheet
TC90A80N
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TC90A80N Summary of contents
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... TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC90A80N,TC90A80F 3-Line Digital Comb Filter for VCR, YNR/CNR, and Skew Correctors (NTSC) The TC90A80N 3-line digital Y/C (luminance/ chrominance) separation IC for VCR. In addition to YNR and CNR used for noise reduction in the playback signal, the IC incorporates skew correctors for special playback ...
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... VCO detector Skew 1/8 1/4 1/2 0 Mix OFF Ped. CLIP + Delay Y-EQ LPF Killer YCS Memory Y-N.C ADC Sync Clamp V TEST SS1 TC90A80N bus sc N.L V-enhancer YNR YNR Memory [B] [A] Dynamic comb Skew Filter corrector Skew detector SS3 DD3 DD4 10 11 ...
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... For normal use, set the pin to Low. DC Level Function (V) 1.3 3.16 5.0 ). DD2 2.5 0.0 ). SS2 1.83 Sync Tip NR Mode : 1.86 YCS Mode : 1.83 0 bus 3 TC90A80N/F Interface Circuit 1 20 Ω 2 Internally connected to pin DD2 20 Ω 15 kΩ 4 Internally connected to pin DD2 20 Ω Ω Ω 150 Ω 8 2002-12-04 ...
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... DC Level Function Sync Tip YCS Mode : 1.86 NR Mode : 1.83 from analog Bus.) 3-level input from analog from analog TC90A80N/F Interface Circuit (V) 20 Ω Ω 0.0 ― 700 Ω 3 1.4 V 5.0 ― 5.0 ― 700 Ω 14 ― 700 Ω 15 ― 700 Ω ...
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... Set the same voltage as that of pin Level Function (V) ― 2. bus. 5.0 0.0 3.0 5.0 ). DD1 3 bus, this Sync Tip : 2.46 0.0 ). SS1 5 TC90A80N/F Interface Circuit 18 170 Ω 19 300 kΩ ― ― 90 Ω 22 100 Ω Internally connected to pin DD1 24 25 Internally connected to pin SS1 2002-12-04 ...
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... GND pins. Toshiba recommend using a capacitor of 0.1 µF or more between analog power supply and GND pins. (For digital pins, use a 0.01-µF capacitor.) DC Level Function (V) 3 bus, this 1.6 6 TC90A80N/F Interface Circuit 27 28 2002-12-04 ...
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... DAT DAT HD t HIGH t LOW Symbol f SCL t ; STA HD t LOW t HIGH t ; DAT DAT STO SU t BUF 7 TC90A80N/F A DATA3 A DATA4 t BUF STO SU Stop Condition Min Max 0 100 4.0 ― 4.7 ― 4.0 ― 0 3.45 250 ― ― 1000 ― 300 4.0 ― ...
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... H8 (L14) 1: OFF V-Emph N.L (YCS) 000: 4 011: 16 110: +1.25 001: 8 100: 20 111: +1.50 010: 12 101: 24 YNR Lim (NR) 000: 1 011: 7 110: 0.75 001: 3 100: 9 111: 0.875 010: 5 101 TC90A80N/F Slave address: 1011010x D-Range Input Clock 00 CNR Corr. Mode1 Y-EQ/N ...
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... Controls the YNR limiter. (Limiter level when converting 100 IRE input.: 1 ≈ −43dB~15 ≈ −19dB) (22) YNR Mode (NR) : Controls YNR and Y-COMB bandwidths. (*-W: Wideband, *-N: Narrowband) (Note that the controls of DATA4 D7 to DATA4 D0 vary according to the setting of DATA1 D7 (function).) .) high, L*: Limiter level when Y- TC90A80N/F . High: Drives out 2002-12-04 ...
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... Function Drang CNR YNR Select EQ/NC Emph △ × C-N.C △ × C-N × △ × O × C-N.C 10 TC90A80N/F P- Sync Y/C Y- Skew Killer M/H output MIX OUT OFF Y × C.Sync ON Y/C OFF HD·PV ON Y/C OFF Y × C.Sync ON Y/C OFF HD· ...
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... Maximum ratings: A set of specified parameter values which must not be exceeded during operation, even for an instant. If any of these limit values is exceeded during operation, it causes permanent damage to the TC90A80N/F. Therefore, care must be exercised that the TC90A80N/F operates within the specified ranges. Recommended operating conditions: Minimum, typical and maximum values for key operating parameters such as ...
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... To support high-speed pulse input, the circuit must have no hysteresis • Test content : Apply DC voltage to pins 8, 14, 15, and TC90A80N/F 2 according to test , I C BUS: p-p Test Conditions (Remarks) C bus setup DATA1 DATA2 DATA3 C bus setup supply pins 3, 12, 13, 20, and 23. C bus setup 0 0 ...
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... SS OH and GND Connects a 4.7-k resistor between pin 17/18 OL and bus setup • Test content : Measure the ACK output voltage when V 0 Connect a 4.7-k resistor between pin 16 and V 13 TC90A80N and 18 when DC is applied with a 4.7-k resistor applied with a 4.7-k resistor. ...
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... Test content : Measure bus setup mVrms • Input signal : No input to pin 9. 4 • Test content : Measure bus setup mVrms • Input signal : No input to pin 9. 20 • Test content : Measure TC90A80N/F according to test conditions ) Test Conditions (Remarks) DATA1 DATA2 DATA3 DATA4 ...
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... Input signal : No input to pin 9. 4 • Test content : Measure bus setup mVrms • Input signal : No input to pin 9. 20 • Test content : Measure 8f 15 TC90A80N/F according to test conditions ) Test Conditions (Remarks) DATA1 DATA2 DATA3 DATA4 (To pin 4, chrominance signal only; to pin 9, composite video signal) ...
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... I C bus setup bus setup • Input signal : Apply 71.4 mVp-p, 2.5-V DC offset • Test content : Monitor pin 27. 16 TC90A80N/F according to test conditions ) Test Conditions (Remarks) DATA1 DATA2 DATA3 DATA4 sine wave to pin 7. Change input frequency. Measure gain difference between 629.36 kHz and 621 ...
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... I C bus setup • Input signal : Apply 10-kHz, 1-Vp-p triangular • Clock input : Change input amplitude 0.5 1.0 2.0 V p-p • Test content : Increase input clock amplitude from 17 TC90A80N/F 2 ccording to test , I C bus: a Test Conditions (Remarks) DATA1 DATA2 DATA3 DATA4 (3.579545 MHz) as reference and measure pull-in range for PLL ...
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... Input setting : Set pin and apply pulse ±280 Hz • Test content : Change input frequency with bus setup • Input setting : Set pin and apply f 300 ns • Test content : Increase input pulse width from 18 TC90A80N/F ccording to test conditions ) Test Conditions (Remarks) DATA1 DATA2 DATA3 DATA4 ...
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... SW8 R35 4.7 k SW2 SW3 SW4 SW5 SW6 SW7 SW8 TC90A80N/F SW11 1 2 Q61 SW10 SW12 Q62 2 L61 27 µH R62 820 SW9 2 2 SW9 SW10 SW11 SW12 Measuring equipment 2 SW12 Measuring equipment GND Clock GND Clock input Mode1 OUT 2002-12-04 ...
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... V HDPVOUT 17 DD3 L03 100 µH SDA 13 V SDA 16 DD4 +5 V (digital) SCL 14 CSYNCIN SCL 15 C.SYNC IN 20 TC90A80N/F Application Circuit (evaluation board Q61 Q63 R62 L61 C63 Q64 Q62 820 27 µH 0.1 µF R70 100 TP61 VR6 Q65 1 kB (550 Q81 ...
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... Package Dimensions Weight: 1.7 g (typ.) 21 TC90A80N/F 2002-12-04 ...
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... Package Dimensions Weight: 0.8 g (typ.) 22 TC90A80N/F 2002-12-04 ...
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... TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. • The information contained herein is subject to change without notice. 23 TC90A80N/F 000707EBA 2002-12-04 ...