TDA7572 STMicroelectronics, TDA7572 Datasheet - Page 38

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TDA7572

Manufacturer Part Number
TDA7572
Description
IC AMP PWM 200W BRIDGE 64HIQUAD
Manufacturer
STMicroelectronics
Type
Class Dr
Datasheet

Specifications of TDA7572

Output Type
1-Channel (Mono)
Voltage - Supply
8 V ~ 58 V
Features
Digital Inputs, I²C, I²S, Mute, Short-Circuit and Thermal Protection, Standby
Mounting Type
Surface Mount
Package / Case
64-HiQUAD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Max Output Power X Channels @ Load
-

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Input stage and gain compressor
6.2.1
38/64
is clipping during that period. The THD estimate is calculated from the ratio between these
times. Clipping means are any of the following conditions occurred: maximum modulation
reached, output current limiting active, or voltage clipping at the AOUT pin. These are used
to estimate THD, which is then mapped to a desired number of discrete steps of gain
reduction. Attenuation is then changed at the next zero crossing of the signal at the Input
Stage block
The attack time sets the minimum time allowed between gain reductions. At low frequency
signals, where the time between zero crossings is greater than the attack time, the attack
rate is dictated by the signal frequency, rather than this setting. Similarly, the decay time sets
the minimum time allowed between gain increases, with the same caveats about rate
dictated by the signal frequency.
The major tuning control here is the distortion-to-attenuation lookup table. It will determine
how aggressively to operate and thus the relative amount of audible artifact. Decay time
adjustment can be varied for audible effect and to mange average power.
Following are reported the correspondence between I
Attack and decay time. The first table reports the one for compressor setting:
Setting in I
GainTable[1:0]: Selects the distortion versus gain step size table to be used, including the
ability to disable the gain compressor.
Table 28.
RELEASE[1:0]: Sets the maximum release rate of the gain compressor according to the
table below:
Table 29.
GainTable [1:0]
Release [1:0]
00
01
10
11
00
01
10
11
Distortion versus gain step size
Sets the maximum release rate of the gain compressor
2
C bus mode
Pseudo THD,% / T2/T1 ratio
Clock counts
0.02
0.02
0.02
15.0
3.0
3.0
5.0
3.0
5.0
2
2
2
2
13
14
15
16
Gain compressor disabled
2
C bus registers and coefficients for
Nominal time at 400KHz clock
Number of gain steps
20.48ms
40.96ms
81.92ms
163.4ms
1
2
1
2
3
1
2
3
4
TDA7572

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