ISD5116SYI Nuvoton Technology Corporation of America, ISD5116SYI Datasheet - Page 21

• Manufacturer Part Number: ISD5116SYI
• Description: IC VOICE REC/PLAY 8-16MN 28-SOIC
• Manufacturer: Nuvoton Technology Corporation of America
• Series: ISD5100r

Specifications of ISD5116SYI

• Interface: I²C
• Filter Pass Band: 1.7 ~ 3.4kHz
• Duration: 8 ~ 16 Min
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• For Use With: ISD-ES511 - EVALUATION SYSTEM FOR ISD5100ISD-ES501 - EVALUATION SYSTEM FOR ISD5008
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

This sequence prepares the ISD5100 Series for an operation to follow, waiting the Tpud time before
sending the next command sequence.
Playback Mode
The command sequence for an analog Playback operation can be handled several ways. The most
straightforward approach would be to incorporate a single four byte exchange, which consists of the
Slave Address (80h), the Command Byte (A9h) for Play Analog @ Address, and the two address
bytes.
VLS1 VLS0 VOL2 VOL1 VOL0 S1S1 S1S0 S1M1 S1M0 S2M1 S2M0 FLS0 FLD1 FLD0 FLPD AGPD
VLS1 VLS0 VOL2 VOL1 VOL0 S1S1 S1S0 S1M1 S1M0 S2M1 S2M0 FLS0 FLD1 FLD0 FLPD AGPD
VLS1 VLS0 VOL2 VOL1 VOL0 S1S1 S1S0 S1M1 S1M0 S2M1 S2M0 FLS0 FLD1 FLD0 FLPD AGPD
VLS1 VLS0 VOL2 VOL1 VOL0 S1S1 S1S0 S1M1 S1M0 S2M1 S2M0 FLS0 FLD1 FLD0 FLPD AGPD
D15 D14 D13 D12 D11 D10 D9
D15 D14 D13 D12 D11 D10 D9
D15 D14 D13 D12 D11 D10 D9
D15 D14 D13 D12 D11 D10 D9
1.
2.
3.
4.
5.
6.
7.
8.
6.3.6
Send I
Send one byte 10000000 {Slave Address, R/W = 0} 80h
Slave ACK
Wait for SCL High
Send one byte 10000000 {Command Byte = Power Up} 80h
Slave ACK
Wait for SCL High
Send I
Power-up Sequence
2
2
C POWER UP
C STOP
Configuration Register 1 (CFG1)
Configuration Register 1 (CFG1)
D8
D8
D8
D8
- 21 -
D7 D 6 D5
D7 D 6 D5
D7 D 6 D5
D7 D 6 D5
AGC AMP Power Down
AGC AMP Power Down
Filter Power Down
Filter Power Down
SAMPLE RATE (& Filter) Set up (2 bits)
SAMPLE RATE (& Filter) Set up (2 bits)
FILTER MUX Select
FILTER MUX Select
SUM 2 SUMMING AMP Control (2 bits)
SUM 2 SUMMING AMP Control (2 bits)
SUM 1 SUMMING AMP Control (2 bits)
SUM 1 SUMMING AMP Control (2 bits)
SUM 1 MUX Select (2 bits)
SUM 1 MUX Select (2 bits)
VOLUME CONTROL (3 bits)
VOLUME CONTROL (3 bits)
VOLUME CONT. MUX Select (2 bits)
VOLUME CONT. MUX Select (2 bits)
Publication Release Date: Oct 31, 2008
D4
D4
D4
D4
ISD5100 SERIES
D3
D3
D3
D3
D2
D2
D2
D2
D1
D1
D1
D1
Revision 1.42
D0
D0
D0
D0