ISD5108EYR Nuvoton Technology Corporation of America, ISD5108EYR Datasheet - Page 20

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ISD5108EYR

Manufacturer Part Number
ISD5108EYR
Description
IC VOICE REC/PLAY 4-8MN 28-TSOP
Manufacturer
Nuvoton Technology Corporation of America
Series
ISD5100r
Datasheet

Specifications of ISD5108EYR

Interface
I²C
Filter Pass Band
1.7 ~ 3.4kHz
Duration
4 ~ 8 Min
Mounting Type
Surface Mount
Package / Case
28-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ISD-ES511 - EVALUATION SYSTEM FOR ISD5100ISD-ES501 - EVALUATION SYSTEM FOR ISD5008
Lead Free Status / RoHS Status
Supplier Unconfirmed, Lead free / RoHS Compliant
The configuration register bytes are defined, in detail, in the drawings of
drawings display how each bit enables or disables a function of the audio paths in the ISD5100-
Series. The tables below give a general illustration of the bits. There are two configuration registers,
CFG0 and CFG1, so there are four 8-bit bytes to be loaded during the set-up of the device.
AIG1 AIG0 AIPD AXG1 AXG0 AXPD INS0 AOS2 AOS1 AOS0 AOPD OPS1 OPS0 OPA1 OPA0 VLPD
AIG1 AIG0 AIPD AXG1 AXG0 AXPD INS0 AOS2 AOS1 AOS0 AOPD OPS1 OPS0 OPA1 OPA0 VLPD
D15 D14 D13 D12 D11 D10 D9
D15 D14 D13 D12 D11 D10 D9
6.3.5
Configuration Register Bytes
Configuration Register 0 (CFG0)
Configuration Register 0 (CFG0)
D8
D8
- 20 -
D7 D 6 D5
D7 D 6 D5
Volume Control Power Down
Volume Control Power Down
SPKR & AUX OUT Control (2 bits)
SPKR & AUX OUT Control (2 bits)
OUTPUT MUX Select (2 bits)
OUTPUT MUX Select (2 bits)
ANA OUT Power Down
ANA OUT Power Down
AUXOUT MUX Select (3 bits)
AUXOUT MUX Select (3 bits)
INPUT SOURCE MUX Select (1 bit)
INPUT SOURCE MUX Select (1 bit)
AUX IN Power Down
AUX IN Power Down
AUX IN AMP Gain SET (2 bits)
AUX IN AMP Gain SET (2 bits)
ANA IN Power Down
ANA IN Power Down
ANA IN AMP Gain SET (2 bits)
ANA IN AMP Gain SET (2 bits)
Publication Release Date: Oct 31, 2008
D4
D4
ISD5100 SERIES
D3
D3
section 7.4
D2
D2
D1
D1
on page 29. The
Revision 1.42
D0
D0

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