SC28L194A1A,529 NXP Semiconductors, SC28L194A1A,529 Datasheet - Page 27

• Manufacturer Part Number: SC28L194A1A,529
• Description: IC UART QUAD SOT188-3
• Manufacturer: NXP Semiconductors

Specifications of SC28L194A1A,529

• Features: False-start Bit Detection
• Number Of Channels: 4, QUART
• Fifo's: 16 Byte
• Voltage - Supply: 3.3V, 5V
• With Auto Flow Control: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Package / Case: 68-LCC (J-Lead)
• Transmit Fifo: 16Byte
• Receive Fifo: 16Byte
• Transmitter And Receiver Fifo Counter: No
• Operating Supply Voltage (typ): 3.3/5V
• Package Type: PLCC
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Supply Current: 30mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935261296529; SC28L194A1A-S; SC28L194A1A-S

Philips Semiconductors
Table 29. IVR - Interrupt Vector Register
The IVR contains the byte that will be placed on the data bus during
an IACKN cycle when the GCCR bits (2:1) are set to binary ‘01’.
This is the unmodified form of the interrupt vector.
Table 30. Modification of the IVR
The table above indicates how the IVR may be modified by the
interrupting source. The modification of the IVR as it is presented to
the data bus during an IACK cycle is controlled by the setting of the
bits (2:1) in the GCCR (Global Chip Configuration Register)
Table 31. GICR - Global Interrupting Channel
A register associated with the interrupting channel as defined in the
CIR. It contains the interrupting channel code for all interrupts.
Table 33. Global Interrupting Type Register
A register associated with the interrupting channel as defined in the
CIR. It contains the type of interrupt code for all interrupts.
2006 Aug 15
Always contains
bits (7:5) of the IVR
Receiver Interrupt
0x - not receiver
10 - with receive errors
11 - w/o receive errors
Quad UART for 3.3 V and 5 V supply voltage
Bits 7:5
Reserved
Bits 7:3
Register
Bit 7:6
8 data bits of the Interrupt Vector (IVR)
Will be replaced
with current
interrupt type if IVC
field of GCCR = 3
Bits 4:3
Bits 7:0
Transmitter Interrupt
0 - not transmitter
1 - transmitter interrupt
Channel code
Bits 2:0
000 = a
001 = b
010 = c
011 = d
Replaced with
interrupting channel
number if IVC field of
GCCR > 1
Bit 5
Bits 2:0
27
Reserved
read b’00
Table 32. GIBCR - Global Interrupting Byte Count
A register associated with the interrupting channel as defined in the
CIR. Its numerical value equals the number of bytes minus 1
(count - 1) ready for transfer to the transmitter or transfer from the
receiver. It is undefined for other types of interrupts
Reserved
Bits 7:4
Bit 4:3
Register
Channel byte count code
0000 = 1 AND RxRDY status set for RxFIFO
0000 = 1 AND TxRDY status set for TxD
0001 = 2
0010 = 3
.
1111 = 16
Other types
000 - not “other” type
001 - Change of State
010 - Address Recognition Event
011 - Xon/Xoff status
100 - Not used
101 - Break Change
11x - do not occur
Bits 3:0
Bit 2:0
SC28L194
Product data sheet