SI3209-A-FMR Silicon Laboratories Inc, SI3209-A-FMR Datasheet - Page 11

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SI3209-A-FMR

Manufacturer Part Number
SI3209-A-FMR
Description
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI3209-A-FMR

Lead Free Status / Rohs Status
Supplier Unconfirmed
Table 10. Switching Characteristics—SPI
(V
Cycle Time SCLK
Rise Time, SCLK
Fall Time, SCLK
Delay Time, SCLK Fall to SDO Active
Delay Time, SCLK Fall to SDO
Transition
Delay Time, CS Rise to SDO Tri-state
Setup Time, CS to SCLK Fall
Hold Time, CS to SCLK Rise
Setup Time, SDI to SCLK Rise
Hold Time, SDI to SCLK Rise
Delay Time between Chip Selects
SDI to SDITHRU Propagation Delay
Note: All timing is referenced to the 50% level of the waveform. Input test levels are V
DDA
SDITHRU
= 3.13 to 5.25 V, T
SCLK
SDO
SDI
CS
Parameter
A
= 0 to 70 °C for F-Grade, –40 to 85 °C for G-Grade, C
t
su1
t
d1
t
r
Figure 1. SPI Timing Diagram
Symbol
t
t
t
t
t
t
t
t
t
su1
su2
t
d1
d2
d3
h1
h2
d4
t
t
cs
c
r
f
Preliminary Rev. 0.33
Test Conditions
t
su2
t
c
t
d2
t
h2
t
d4
L
= 20 pF)
IH
Min
220
62
25
20
25
20
= V
DDD
–0.4 V, V
t
f
Typ
t
4
h1
Si3208/9
IL
= 0.4 V
Max
25
25
20
20
20
10
t
cs
t
d3
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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