NBVSBA037LN1TAG ON Semiconductor, NBVSBA037LN1TAG Datasheet - Page 2

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NBVSBA037LN1TAG

Manufacturer Part Number
NBVSBA037LN1TAG
Description
Manufacturer
ON Semiconductor
Datasheet

Specifications of NBVSBA037LN1TAG

Lead Free Status / Rohs Status
Supplier Unconfirmed
1. Control voltage has a positive slope with a linearity of ±10%; V
Table 1. PIN DESCRIPTION
Pin No.
1
2
3
4
5
6
V
C
Symbol
GND
(Note 1)
CLK
CLK
V
OE
DD
Table 3. ATTRIBUTES
2. For additional Moisture Sensitivity information, refer to Application Note AND8003/D.
Internal Default State Resistor
ESD Protection
Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test
LVTTL/LVCMOS
LVPECL Output
LVPECL Output
Power Supply
Power Supply
Control Input
Analog Input
I/O
Table 2. OUTPUT ENABLE TRI−STATE FUNCTION
Characteristic
V
V
DD
C
1
6
HIGH Level
LOW Level
Figure 2. Pin Connections
Figure 1. Simplified Logic Diagram
OE Pin
Analog control voltage input pin that adjusts output oscillation frequency. f
Output Enable Pin. When left floating pin defaults to logic HIGH and output is active.
See OE pin description Table 2.
Ground at 0 V. Electrical and Case Ground.
Non−Inverted Clock Output. Typically loaded with 50 W receiver termination resistor to
V
Inverted Clock Output. Typically loaded with 50 W receiver termination resistor
to V
Positive Power Supply Voltage. Voltage should not exceed 2.5 V ±5% and 3.3 V ±10%.
Human Body Model
Open
TT
TT
= V
Machine Model
GND
= V
OE
V
DD
http://onsemi.com
C
DD
− 2 V.
− 2 V.
Multiplier
1
2
3
Clock
C
PLL
OE
= 1.65 V ± 1 V.
2
2
6
5
4
V
CLK
CLK
Output Pins
(Top View)
DD
High Z
Active
Active
Description
CLK CLK
GND
170 kW
Value
200 V
2 kV
5
3
4
0
=V
C
= 1.65 V

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