DS2155L Maxim Integrated Products, DS2155L Datasheet

IC TXRX T1/E1/J1 1-CHIP 100-LQFP

DS2155L

Manufacturer Part Number
DS2155L
Description
IC TXRX T1/E1/J1 1-CHIP 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheets

Specifications of DS2155L

Function
Single-Chip Transceiver
Interface
E1, HDLC, J1, T1
Number Of Circuits
1
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
BERT Generator and Detector, CMI Coder and Decoder, HDLC Controller
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power (watts)
-

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REVISION A3 ERRATA
The errata listed below describe situations where DS2155 revision A3 components perform differently
than expected or differently tha n described in the data sheet. Dallas Semiconductor intends to fix these
errata in subsequent die revisions.
This errata sheet only applies to DS2155 revision A3 components. Revision A3 components are branded
on the top side of the package with a six-digit code of the form yywwA3, where yy and ww are two-digit
numbers representing the year and work-week of manufacture, respectively. The die revision can also be
determined through the lower four bits of the IDR register at location 0Fh. Revision A3 devices contain a
B0h at location 0Fh. To obtain an errata sheet on another DS2155 die revision, visit the website at
www.maxim-
1. RECEIVE PACKET BYTES AVAILABLE REGISTER
2. RECEIVE DIGITAL MILLIWATT (T1 MODE)
www.maxim-ic.com
Description:
The HDLC receive bytes available in the H1RPBA and H2RPBA registers may not report the correct
value.
Work Around:
Do not use the HxRPBA registers. Poll the REMPTY (in the INFO5 and INFO6 registers) bit after
each byte is read from the receive FIFO until the bit indicates that there are no more bytes to be
retrieved.
Description:
The receive digital- milliwatt enable channel-selection bits are scrambled in the T1RDMR1,
T1RDMR2, and T1RDMR3 registers.
The data sheet shows the channel assignment as follows:
Work Around:
Use the channel assignment as implemented in the DS2155 revision A3:
T1RDMR1
T1RDMR2
T1RDMR3
T1RDMR1
T1RDMR2
T1RDMR3
ic.com.
16
24
14
17
8
3
15
23
20
7
6
9
14
22
23
12
6
1
1 of 7
T1/E1/J1 Single-Chip Transceiver
13
21
15
18
5
4
12
20
21
10
4
7
11
19
24
13
3
2
10
18
16
19
2
5
17
22
11
1
9
8
ERRATA SHEET
DS2155
032702

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DS2155L Summary of contents

Page 1

REVISION A3 ERRATA The errata listed below describe situations where DS2155 revision A3 components perform differently than expected or differently tha n described in the data sheet. Dallas Semiconductor intends to fix these errata in subsequent die revisions. This ...

Page 2

TRANSMIT SA BIT SELECT (E1 MODE) Description: The 5 bits that control the Sa bits to be sourced from the TLINK pin are reversed from the order described in the data sheet for the E1TCR2 register. E1TCR2 Sa8S (Data ...

Page 3

RECEIVE FRACTIONAL SUPPORT Description: The receive fractional support (alternate function of the RCHCLK pin) does not operate as described in the data sheet. Receive data at the RSER pin is updated on the rising edge of RCLK. In fractional ...

Page 4

HDLC SS7 SUPPORT Description: The SS7 support features “transmit loop” and “receive FISU discard” are not available in the DS2155 A3 revision. Work Around: There is no known software work around for this issue. 9. TCLK JITTER Description: More ...

Page 5

E1 HDLC CONTROLLERS ARE NOT TESTED BELOW ROOM TEMPERATURE Description: When operating in E1 mode, the HDLC controllers may not function properly at temperatures below room temperature. Work Around: Avoid operation at temperatures below room temperature if using the ...

Page 6

WRITING TO THE HDLC TRANSMIT FIFO REQUIRES VERIFICATION Description: The potential exists for the data written into the HDLC transmit FIFO user ports (registers H1TF and H2TF) not to be transferred into the HDLC transmit FIFOs. Work Around: Method ...

Page 7

TRANSMIT ELASTIC STORE SLIP Description: When the transmit elastic store is enabled and a slip occurs, the transmit framer restarts the insertion of the multiframe alignment pattern. This may cause the remote port to lose sync. Work Around: There ...

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