SI3211-BT Silicon Laboratories Inc, SI3211-BT Datasheet - Page 121

• Manufacturer Part Number: SI3211-BT
• Description: IC SLIC/CODEC PROG 1CH 38TSSOP
• Manufacturer: Silicon Laboratories Inc
• Series: ProSLIC®r

Specifications of SI3211-BT

• Package / Case: *
• Function: Subscriber Line Interface Concept (SLIC), CODEC
• Interface: PCM, SPI
• Number Of Circuits: 1
• Voltage - Supply: 3.3V, 5V
• Current - Supply: 88mA
• Power (watts): 700mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Includes: BORSCHT Functions, DTMF Generation and Decoding, FSK Caller ID Generation, Pulse Metering Generation, Ringing and Battery Voltag
• Product: Telecom
• Supply Voltage (min): 3.13 V
• Supply Current: 88 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Channels: 1
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

4.3. Digital Programmable Gain/Attenuation
See functional description sections of digital programmable gain/attenuation for guidelines on computing register
values. All values are represented in 2s-complement format.
Note: The values of all indirect registers are undefined following the reset state. Shaded areas denote bits that can be read
Addr.
Addr.
26
27
26
27
and written but must be written to zeroes.
Receive Path Digital to Analog Converter Gain/Attenuation.
This register sets gain/attenuation for the receive path. The digitized signal is effectively mul-
tiplied by DACG to achieve gain/attenuation. A value of 0x00 corresponds to – dB gain
(mute). A value of 0x400 corresponds to unity gain. A value of 0x7FF corresponds to a gain
of 6 dB.
Transmit Path Analog to Digital Converter Gain/Attenuation.
This register sets gain/attenuation for the transmit path. The digitized signal is effectively
multiplied by ADCG to achieve gain/attenuation. A value of 0x00 corresponds to – dB gain
(mute). A value of 0x400 corresponds to unity gain. A value of 0x7FF corresponds to a gain
of 6 dB.
D15
Table 42. Digital Programmable Gain/Attenuation Indirect Registers Description
Table 41. Digital Programmable Gain/Attenuation Indirect Registers Summary
D14
D13
D12
D11
DACG[11:0]
ADCG[11:0]
D10
Description
D9
Rev. 1.5
D8
D7
D6
D5
Si3210/Si3211
D4
D3
D2
Reference
D1
Page
48
48
D0
121