SI3211-E-FT Silicon Laboratories Inc, SI3211-E-FT Datasheet - Page 33

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SI3211-E-FT

Manufacturer Part Number
SI3211-E-FT
Description
IC SLIC/CODEC PROG 1CH 38QFN
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheets

Specifications of SI3211-E-FT

Function
Subscriber Line Interface Concept (SLIC), CODEC
Interface
PCM, SPI
Number Of Circuits
1
Voltage - Supply
3.3V, 5V
Current - Supply
88mA
Power (watts)
700mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
*
Includes
BORSCHT Functions, DTMF Generation and Decoding, FSK Caller ID Generation, Pulse Metering Generation, Ringing and Battery Voltag
Product
Telecom
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PPT56
Power Alarm Threshold, Q1 & Q2
Power Alarm Threshold, Q3 & Q4
Power Alarm Threshold, Q5 & Q6
*Note: The ProSLIC uses registers that are both directly and indirectly mapped. A “direct” register is one that is mapped
Power Alarm Interrupt Pending
Power Alarm Interrupt Enable
Thermal LPF Pole, Q1 & Q2
Thermal LPF Pole, Q3 & Q4
Thermal LPF Pole, Q5 & Q6
Line Power Monitor Output
Automatic/Manual Detect
Power Monitor Pointer
=
directly. An “indirect” register is one that is accessed using the indirect access registers (direct registers 28 through
31).
------------------------------ -
Resolution
Power Alarm
P
Parameter
MAX
Table 25. Associated Power Monitoring and Power Fault Registers
2
7
=
----------------- -
0.0304
1.28
2
7
Bits 2 to 7 correspond
Bits 2 to 7 correspond
0 to 0.9 W for Q3, Q4
0 to 5 points to Q1 to
Description/ Range
to Q1 to Q6, respec-
to Q1 to Q6, respec-
1 = enter open state
=
upon power alarm
0 to 7.8 W for Q1,
0 = manual mode
Q6, respectively
5389
Q2, Q5, Q6
0 to 7.8 W
0 to 0.9 W
0 to 7.8 W
See equation above.
See equation above.
See equation above.
tively
tively
=
150Dh
Rev. 1.5
Note: The power monitor resolution for Q3 and Q4 is different
Resolution
30.4 mW
3.62 mW
30.4 mW
3.62 mW
30.4 mW
from that of Q1, Q2, Q5, and Q6.
n/a
n/a
n/a
n/a
PWRMP[2:0]
PWROM[7:0]
QnAP[n+1],
where n = 1
QnAE[n+1],
where n = 1
PPT12[7:0]
PPT34[7:0]
PPT56[7:0]
NQ12[7:0]
NQ34[7:0]
NQ56[7:0]
Register
AOPN
Bits
to 6
to 6
Si3210/Si3211
Indirect Register 32
Indirect Register 33
Indirect Register 34
Indirect Register 37
Indirect Register 38
Indirect Register 39
Direct Register 76
Direct Register 77
Direct Register 19
Direct Register 22
Direct Register 67
Location*
33

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