STM32F417ZGT6 STMicroelectronics, STM32F417ZGT6 Datasheet - Page 130

• Manufacturer Part Number: STM32F417ZGT6
• Description: Microcontrollers (MCU) ARM M4 1024 FLASH 168 Mhz 192kB SRAM
• Manufacturer: STMicroelectronics

Specifications of STM32F417ZGT6

• Core: ARM Cortex M4
• Processor Series: STM32F4
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 168 MHz
• Program Memory Size: 1024 KB
• Data Ram Size: 192 KB
• On-chip Adc: Yes
• Number Of Programmable I/os: 114
• Number Of Timers: 10
• Operating Supply Voltage: 1.7 V to 3.6 V
• Package / Case: LQFP-144
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 2
• Interface Type: CAN, I2C, I2S, SPI, UART
• Program Memory Type: Flash
• Lead Free Status / Rohs Status: Details

Electrical characteristics
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Figure 54. Asynchronous multiplexed PSRAM/NOR read waveforms
Table 73.
1. C
2. Based on characterization, not tested in production.
t
t
t
t
t
su(Data_NOE)
t
h(Data_NOE)
t
h(AD_NADV)
t
v(NADV_NE)
t
su(Data_NE)
h(NE_NOE)
t
v(NOE_NE)
h(BL_NOE)
h(Data_NE)
t
Symbol
t
h(A_NOE)
t
v(BL_NE)
t
w(NADV)
v(A_NE)
w(NOE)
t
L
w(NE)
= 30 pF.
FSMC_NBL[1:0]
FSMC_ AD[15:0]
FSMC_A[25:16]
Asynchronous multiplexed PSRAM/NOR read timings
FSMC_NADV
FSMC_NE low time
FSMC_NEx low to FSMC_NOE low
FSMC_NOE low time
FSMC_NOE high to FSMC_NE high hold time
FSMC_NEx low to FSMC_A valid
FSMC_NEx low to FSMC_NADV low
FSMC_NADV low time
FSMC_AD(adress) valid hold time after
FSMC_NADV high)
Address hold time after FSMC_NOE high
FSMC_BL time after FSMC_NOE high
FSMC_NEx low to FSMC_BL valid
Data to FSMC_NEx high setup time
Data to FSMC_NOE high setup time
Data hold time after FSMC_NEx high
Data hold time after FSMC_NOE high
FSMC_NWE
FSMC_NOE
FSMC_NE
Doc ID 022063 Rev 2
Parameter
t
t
t
v(NADV_NE)
v(A_NE)
t
v(A_NE)
t
t
v(NOE_NE)
v(BL_NE)
w(NADV)
Address
Address
t
h(AD_NADV)
t
w(NE)
NBL
t
su(Data_NOE)
t
t
w(NOE)
su(Data_NE)
Data
2T
3T
t
T
T
T
T
T
h(NE_NOE)
STM32F415xx, STM32F417xx
HCLK
t
T
HCLK
HCLK
HCLK
HCLK
HCLK
h(BL_NOE)
t
HCLK
h(A_NOE)
Min
HCLK
0
0
0
0
1
-
-
–0.5
– 2
–1
+4
+4
–1
–1
(1)(2)
2T
3T
T
T
t
HCLK
h(Data_NOE)
HCLK
HCLK
t
HCLK
Max
h(Data_NE)
3
2
2
-
-
-
-
-
-
-
-
+0.5
+1
+1
ai14892b
+1
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns