STEVAL-PCC010V2 STMicroelectronics, STEVAL-PCC010V2 Datasheet - Page 25

• Manufacturer Part Number: STEVAL-PCC010V2
• Description: BOARD EVAL FOR ST802RT1A
• Manufacturer: STMicroelectronics
• Series: -r

Specifications of STEVAL-PCC010V2

• Design Resources: STEVAL-PCC010V2 BOM STEVAL-PCC010V2 Schematic
• Main Purpose: Interface, Ethernet Controller (PHY and MAC)
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: ST802RT1A, STM32F207
• Primary Attributes: 1 Port, 100BASE-TX/10BASE-T
• Secondary Attributes: MII, RMII
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-11465

ST802RT1A, ST802RT1B
Table 16.
15:5
Bit
4
3
2
1
0
Auto-Negotiation
Next Page Able
Next Page Able
Detection Fault
Page Received
RESERVED
Link Partner
Link Partner
Bit name
Parallel
Able
Reserved: Ignore when read.
LP pause: Indicates that the link partner pause bit is set.
LP selector field: Bits 4:0 of the link partner ability register reflect the value of the Link
partner's selector field. These bits are cleared any time auto-negotiation is restarted or the
chip is reset.
Advertisement bits: Bits 9: 5 of the link partner ability register reflect the abilities of the Link
partner. A “1” on any of these bits indicates that the link partner is capable of performing the
corresponding mode of operation. Bits 9:5 are cleared any time auto-negotiation is restarted
or the ST802RT1x is reset.
RN06 [0d06, 0x06]: Auto-negotiation expansion register
Reserved: Ignore when read.
Parallel detection fault: Bit 4 of the auto-negotiation expansion register is a read-only bit
that gets latched high when a parallel detection fault occurs in the auto-negotiation state
machine. For further details, please consult the IEEE standard. The bit is reset to “0” after
the register is read, or when the chip is reset.
LP next page able: Bit 3 of the auto-negotiation expansion register returns a “1” when the
link partner has next page capabilities. It has the same value as bit 15 of the link partner
ability register.
Page received: Bit 1 of the auto-negotiation expansion register is latched high when a new
link code word is received from the link partner, checked, and acknowledged. It remains high
until the chip is reset.
LP auto-negotiation able: Bit 0 of the auto-negotiation expansion register returns a “1”
when the link partner is known to have auto-negotiation capability. Before any auto-
negotiation information is exchanged, or if the link partner does not comply with IEEE auto-
negotiation, the bit returns a value of “0”.
--
1 -> A fault has been detected via the parallel detection
function (updated on read)
0 -> A fault has not been detected
1 -> LP is next-page able
0 -> LP does not support next pages
1 -> Local device is next-page able
Fixed to 1
1 -> Link code word received (updated on read)
0 -> Link code word not yet received
1 -> LP supports auto-negotiation (updated on read)
0 -> LP does not support auto-negotiation
Doc ID 17049 Rev 1
Description
Registers and descriptors description
00000000000
Default
0
0
1
0
0
type
RW
RO
RO
RO
RO
RO
RO
Type
25/58
LH
LH
LH
P
P
-